ADSP-2141L View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'ADSP-2141L' PDF : 39 Pages View PDF
ADSP-2141L
Parameter
IDMA Address Latch (IDMA Mode Multiplex Bus)
Timing Requirements:
tIALP
tIASU
tIAH
tIKA
tIALS
Duration of Address Latch1, 2
MPLX_BUS Address Setup Before Address Latch End2
MPLX_BUS Address Hold After Address Latch End2
MPLX9 Low Before Start of Address Latch2, 3
Start of Write or Read After Address Latch End2, 3
NOTES
1Start of Address Latch = MPLX7 Low and MPLX8 High.
2Start of Write or Read = MPLX7 Low and MPLX6 Low or MPLX5 Low.
3End of Address Latch = MPLX7 High or MPLX8 Low.
Min
10
5
3
0
4
Max
/ MPLX9 IACK
/ MPLX8 IAL
/ MPLX7 IS
/ MPLX_BUS IAD15–0
/ MPLX5 OR MPLX6 IRD OR IWR
t IKA
t IALP
t IASU
t IAH
t IALS
Figure 18. IDMA Address Latch (IDMA Mode Multiplex Bus)
Unit
ns
ns
ns
ns
ns
–28–
REV. 0
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