ADSP-BF522C/ADSP-BF523C/ADSP-BF524C/ADSP-BF525C/ADSP-BF526C/ADSP-BF527C
TIMING SPECIFICATIONS
TWI Timing
Table 17. TWI Timing
Parameter
Test Conditions1 Min Max Unit
tSCS
Start condition setup time
tSCH
Start condition hold time
tPH
CSCL pulse width high
tPL
CSCL pulse width low
fSCL
CSCL frequency
tDS
Data setup time
tDH
Data hold time
tRT
CSDA and CSCL rise time
tFT
CSDA and CSCL fall time
tHCS
Stop condition setup time
600
ns
600
ns
600
ns
1.3
μs
0 526 kHz
100
ns
900 ns
300 ns
300 ns
600
ns
1 AVDD, HPVDD, VDDEXT = 3.3 V, AGND = 0 V, TA = +25°C, Slave Mode, fS = 48 kHz, XTI/CODEC_MCLK = 256 × fS unless otherwise stated.
CSDA
CSCL
tSCH
tPL
tRT
tDS
tPH
tDH
Figure 18. TWI Timing
tSCS
tFT
tHCS
Rev. A | Page 25 of 36 | March 2010