ADUC7033BSTZ-88 View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'ADUC7033BSTZ-88' PDF : 140 Pages View PDF
ADuC7033
User software must ensure that the Flash/EE memory controller
has completed any erase or write cycle before the PLL is
powered down. If the PLL is powered down before an erase or
write cycle is completed, the Flash/EE page or byte may be
corrupted.
The following sections provide detailed descriptions of the bit
designations for each of the Flash/EE memory control MMRs.
FEE0CON and FEE1CON Registers
Name:
FEE0CON and FEE1CON
Address:
0xFFFF0E08 and 0xFFFF0E88
Default Value: 0x07
Access:
Read/write access
Function:
These 8-bit registers are written by user code to control the operating modes of the Flash/EE memory controllers for
Block0 (32 kB) and Block1 (64 kB).
Table 13. Command Codes in FEE0CON and FEE1CON
Code Command
Description1
0x002 Reserved
Reserved, this command should not be written by user code.
0x012 Single Read
Load FEExDAT with the 16-bit data indexed by FEExADR.
0x022 Single Write
Write FEExDAT at the address pointed by FEExADR. This operation takes 50 μs.
0x032 Erase-Write
Erase the page indexed by FEExADR and write FEExDAT at the location pointed by FEExADR. This operation
takes 20 ms.
0x042 Single Verify
Compare the contents of the location pointed by FEExADR to the data in FEExDAT. The result of the comparison
is returned in FEExSTA Bit 1.
0x052 Single Erase Erase the page indexed by FEExADR.
0x062 Mass Erase
Erase Block0 (30 kB) or Block1 (64 kB) of user space. The 2 kB kernel is protected. This operation takes 1.2 sec. To
prevent accidental execution, a command sequence is required to execute this instruction, this is described in
the following command codes.
0x07
Default command.
0x08 Reserved
Reserved, this command should not be written by user code.
0x09 Reserved
Reserved, this command should not be written by user code.
0x0A Reserved
Reserved, this command should not be written by user code.
0x0B Signature
FEE0CON: This command results in a 24-bit LFSR-based signature being generated and loaded into FEE0SIG.
If FEE0ADR is less than 0x97800, this command results in a 24-bit LFSR-based signature of the user code space
from the page specified in FEE0ADR upwards, including the kernel, security bits, and the Flash/EE memory key.
If FEE0ADR is greater than 0x97800, the kernel and manufacturing data is signed. This operation takes 120 μs.
FEE1CON: This command results in a 24-bit LFSR based signature been generated, beginning at FEE1ADR and
ending at the end of the 64 kB block, and loaded into FEE1SIG. The last page of this block is not included in the
sign generation.
0x0C Protect
This command can be run only one time. The value of FEExPRO is saved and can be removed only with a mass
erase (0x06) or with the key.
0x0D Reserved
Reserved, this command should not be written by user code.
0x0E Reserved
Reserved, this command should not be written by user code.
0x0F Ping
No operation, interrupt generated.
1 x is 0 or 1 to designate Flash/EE memory Block0 or Block1.
2 The FEExCON always reads 0x07 immediately after execution of any of these commands.
Rev. B | Page 27 of 140
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