ADUC7033BSTZ-88 View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'ADUC7033BSTZ-88' PDF : 140 Pages View PDF
FEE0ADR and FEE1ADR Registers
Name:
FEE0ADR and FEE1ADR
Address:
0xFFFF0E10 and 0xFFFF0E90
Default
Value:
0x0000 (FEE1ADR). For FEE0ADR, see the
System Identification FEE0ADR section.
Access:
Read/write
Function:
This 16-bit register dictates the address upon
which any Flash/EE command executed via
FEExCON acts.
ADuC7033
FEE0DAT and FEE1DAT Registers
Name:
FEE0DAT and FEE1DAT
Address:
0xFFFF0E0C and 0xFFFF0E8C
Default
Value:
0x0000
Access:
Read/write
Function:
This 16-bit register contains the data either read
from or to be written to the Flash/EE memory
FEE0MOD and FEE1MOD Registers
Name:
FEE0MOD and FEE1MOD
Address:
0xFFFF0E04 and 0xFFFF0E84
Default Value: 0x00
Access:
Read/write access
Function:
These registers are written by user code to configure the mode of operation of the Flash/EE memory controllers.
Table 15. FEE0MOD and FEE1MOD MMR Bit Designations
Bit
Description1
15 to 7 Not Used. These bits are reserved for future functionality and should be written as 0 by user code.
6, 5
Flash/EE Security Lock Bits. These bits must be written as [6,5] = 1, 0 to complete the Flash/EE security protect sequence.
4
Flash/EE Controller Command Complete Interrupt Enable.
Set to 1 by user code to enable the Flash/EE controller to generate an interrupt upon completion of a Flash/EE command.
Cleared to disable the generation of a Flash/EE interrupt upon completion of a Flash/EE command.
3
Flash/EE Erase/Write Enable.
Set by user code to enable the Flash/EE erase and write access via FEExCON.
Cleared by user code to disable the Flash/EE erase and write access via FEExCON.
2
Reserved and should be written as zero.
1
Flash/EE Controller Abort Enable. Set to 1 by user code to enable the Flash/EE controller abort functionality.
0
Reserved and should be written as zero.
1 x is 0 or 1 to designate Flash/EE memory Block0 or Block1.
Rev. B | Page 29 of 140
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