ADUC7033BSTZ-88 View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'ADUC7033BSTZ-88' PDF : 140 Pages View PDF
ADuC7033
VOLTAGE/TEMPERATURE CHANNEL ADC
(V/T-ADC)
The voltage/temperature channel ADC (V/T-ADC) converts
additional battery parameters such as voltage and temperature.
The input to this channel can be multiplexed from one of three
input sources, namely: an external voltage, an external tempera-
ture sensor circuit, and an on-chip temperature sensor.
As with the current channel ADC, the V/T-ADC employs an
identical Σ-Δ conversion technique, including a modified Sinc3
low-pass filter to give a valid 16-bit data conversion result at
programmable output rates from 4 Hz to 8 kHz. An external RC
filter network is not required because this is internally imple-
mented in the voltage channel.
The external battery voltage (VBAT) is routed to the ADC input
via an on-chip, high voltage (divide-by-24), resistive attenuator.
This must be enabled/disabled through HVCFG1[7].
The battery temperature is derived through the on-chip
temperature sensor or an external temperature sensor input.
The time to a first valid (fully settled) result after an input
channel switch on the voltage/temperature channel is three
ADC conversion cycles with chop mode turned off.
This ADC is again buffered, but unlike the current channel, has
a fixed input range of 0 V to VREF on VTEMP and 0 V to
28.8 V on VBAT (assuming an internal 1.2 V reference). A top
level overview of this ADC signal chain is shown in Figure 18.
DIFFERENTIAL
ATTENUATOR
DIVIDE-BY-24, INPUT
ATTENUATOR
BUFFER AMPLIFIERS
THE BUFFER AMPLIFIERS
PRESENT A HIGH
IMPEDANCE INPUT STAGE
FOR THE ANALOG INPUT.
VBAT
45R*
2R*
1R*
VTEMP
BUF
BUF
INTERNAL
TEMP
MUX CHOP
ANALOG INPUT
PROGRAMMABLE CHOPPING
THE INPUTS ARE
ALTERNATELY REVERSED
THROUGH THE CONVERSION
CYCLE.
Σ-Δ MODULATOR
THE MODULATOR PROVIDES A
HIGH FREQUENCY 1-BIT DATA
STREAM (THE OUTPUT OF
WHICH IS ALSO CHOPPED) TO
THE DIGITAL FILTER, THE DUTY
CYCLE OF WHICH REPRESENTS
THE SAMPLED ANALOG INPUT
VOLTAGE.
Σ-Δ ADC
THE Σ-Δ
ARCHITECTURE
ENSURES 16 BITS
NO MISSING CODES.
OUTPUT AVERAGE
AS PART OF THE CHOPPING
IMPLEMENTATION, EACH
DATA-WORD OUTPUT FROM
THE FILTER IS SUMMED AND
AVERAGED WITH ITS
PREDECESSOR.
Σ-Δ ADC
Σ-Δ
PROGRAMMABLE
MODULATOR DIGITAL FILTER
CHOP
INTERNAL
REFERENCE
OFFSET
COEFFICIENT
GAIN
COEFFICIENT
OUTPUT
AVERAGE
VREF
PRECISION REFERENCE
THE INTERNAL 5ppm/°C
REFERENCE IS ROUTED TO
THE ADC BY DEFAULT. AN
EXTERNAL REFERENCE ON
THE VREF PIN CAN ALSO
BE SELECTED.
OUTPUT SCALING
THE OUTPUT WORD FROM
THE DIGITAL FILTER IS
SCALED BY THE CALIBRATION
COEFFICIENTS BEFORE BEING
PROVIDED AS THE
CONVERSION RESULT.
OUTPUT
FORMAT
ADC
RESULT
TO VOLTAGE OR
TEMPERATURE
DATA MMR
*R = 70kΩ
PROGRAMMABLE
DIGITAL FILTER
THE SINC3 FILTER REMOVES
QUANTIZATION NOISE INTRODUCED
BY THE MODULATOR. THE UPDATE
RATE AND BANDWIDTH OF THIS
FILTER ARE PROGRAMMABLE VIA
THE ADCFLT MMR.
ADC
INTERRUPT
ADC INTERRUPT GENERATOR
GENERATES AN ADC
INTERRUPT ONCE A VOLTAGE
OR TEMPERATURE
CONVERSION IS COMPLETED.
Figure 18. Voltage/Temperature ADC, Top Level Overview
Rev. B | Page 45 of 140
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