APU0071-002WE-TY View Datasheet(PDF) - Anpec Electronics
Part Name
Description
MFG CO.
'APU0071-002WE-TY' PDF : 28 Pages View PDF
APU0071
1-6. Function Set
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Code 0
0
0
0 1 DL A
∗ M1 M0
" ∗ " : Don't care
DL : Interface data length control bit
When DL = “High”, 8-bit bus mode with MPU.
When DL = “Low”, 4-bit bus mode with MPU. Thus, DL is a signal to select 8-bit or 4-bit bus mode.
In 4-bit bus mode, the 4-bit data is transferred twice.
A : Set the display data-addressing mode
When A = “Low”, DDRAM addressing mode 0. (1 Line)
When A = “High”, DDRAM addressing mode 1. (2 Line)
M0 : Set COM / SEG output rotation
When M0 = “Low”, Bottom view.
When M0 = “High”, Top view.
M1 : Set display line and character mode
When M1 = “Low”, LCD module Rotation mode A.
When M1 = “High”, LCD module Rotation mode B.
(Refer to Application information)
1-7. Set CGRAM Address
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Code 0
0
0
1
∗ AC4 AC3 AC2 AC1 AC0
MSB
LSB
" ∗ " : Don't care
Set CGRAM address to AC.
This instruction allows the MPU to access CGRAM data for user defined character pattern.
Available CGRAM Address is lower 5 bits (DB4 ~ DB0) .
Copyright ANPEC Electronics Corp.
13
Rev. A.07 - FEB., 2002
www.anpec.com.tw
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