AT80C32X2 View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'AT80C32X2' PDF : 55 Pages View PDF
TS8xCx2X2
Definition of terms
Control and program signals must be held at the levels indicated in Table 35.
Address Lines: P1.0-P1.7, P2.0-P2.4 respectively for A0-A12
Data Lines: P0.0-P0.7 for D0-D7
Control Signals: RST, PSEN, P2.6, P2.7, P3.3, P3.6, P3.7.
Program Signals: ALE/PROG, EA/VPP.
Table 20. EPROM Set-up Modes
Mode
RST
ALE/ EA/
PSEN PROG VPP
P2.6
P2.7
P3.3
P3.6
P3.7
Program Code data
1
0
12.75V
0
1
1
1
1
Verify Code data
1
0
1
1
0
0
1
1
Program Encryption
Array Address 0-3Fh
1
0
12.75V
0
1
1
0
1
Read Signature Bytes 1
0
1
1
0
0
0
0
Program Lock bit 1
1
0
12.75V
1
1
1
1
1
Program Lock bit 2
1
0
12.75V
1
1
1
0
0
Program Lock bit 3
1
0
12.75V
1
0
1
1
0
Figure 11. Set-Up Modes Configuration
PROGRAM SIGNALS*
EA/VPP
ALE/PROG
CONTROL SIGNALS*
4 to 6 MHz
RST
PSEN
P2.6
P2.7
P3.3
P3.6
P3.7
XTAL1
* See Table 31. for proper value on these inputs
+5V
VCC
P0.0-P0.7
D0-D7
P1.0-P1.7
P2.0-P2.4
A0-A7
A8-A12
VSS
GND
33
4184I–8051–02/08
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