Figure 16. ICC Test Condition, Power-down Mode
Reset = Vss after a high pulse
during at least 24 clock cycles
RST
VCC
ICC
VCC
VCC
P0
EA
(NC)
XTAL2
XTAL1
VSS
All other pins are disconnected.
Figure 17. Clock Signal Waveform for ICC Tests in Active and Idle Modes
VCC-0.5V
0.45V
0.7VCC
0.2VCC-0.1
TCHCL
TCLCH
TCLCH = TCHCL = 5ns.
AC Parameters
Explanation of the AC
Symbols
Each timing symbol has 5 characters. The first character is always a “T” (stands for
time). The other characters, depending on their positions, stand for the name of a signal
or the logical status of that signal. The following is a list of all the characters and what
they stand for.
Example:TAVLL = Time for Address Valid to ALE Low.
TLLPL = Time for ALE Low to PSEN Low.
TA = 0 to +70°C (commercial temperature range); VSS = 0 V; VCC = 5V ± 10%; -M and -V
ranges.
TA = -40°C to +85°C (industrial temperature range); VSS = 0 V; VCC = 5V ± 10%; -M and
-V ranges.
TA = 0 to +70°C (commercial temperature range); VSS = 0 V; 2.7 V < VCC < 5.5V; -L
range.
TA = -40°C to +85°C (industrial temperature range); VSS = 0 V; 2.7 V < VCC < 5.5V; -L
range.
Table 24. gives the maximum applicable load capacitance for Port 0, Port 1, 2 and 3,
and ALE and PSEN signals. Timings will be guaranteed if these capacitances are
respected. Higher capacitance values can be used, but timings will then be degraded.
Table 24. Load Capacitance versus speed range, in pF
-M
-V
-L
Port 0
100
50
100
Port 1, 2, 3
80
50
80
ALE / PSEN
100
30
100
Table 5., Table 29. and Table 32. give the description of each AC symbols.
Table 27., Table 30. and Table 33. give for each range the AC parameter.
40 TS8xCx2X2
4184I–8051–02/08