AT80C51RA2-3CSCV View Datasheet(PDF) - International Rectifier
Part Name
Description
MFG CO.
'AT80C51RA2-3CSCV' PDF : 85 Pages View PDF
Figure 9-1. Set-Up Modes Configuration
AT/TS8xC51Rx2
PROGRAM SIGNALS*
CONTROL SIGNALS*
4 to 6 MHz
* See Table 31. for proper value on these inputs
EA/VPP
ALE/PROG
RST
PSEN
P2.6
P2.7
P3.3
P3.6
P3.7
+5V
VCC
P0.0-P0.7
D0-D7
P1.0-P1.7
P2.0-P2.5
P3.4-P3.5
A0-A7
A8-A15
XTAL1
VSS
GND
9.3.3
Programming Algorithm
The Improved Quick Pulse algorithm is based on the Quick Pulse algorithm and decreases the
number of pulses applied during byte programming from 25 to 1.
To program the TS87C51RB2/RC2/RD2 the following sequence must be exercised:
• Step 1: Activate the combination of control signals.
• Step 2: Input the valid address on the address lines.
• Step 3: Input the appropriate data on the data lines.
• Step 4: Raise EA/VPP from VCC to VPP (typical 12.75V).
• Step 5: Pulse ALE/PROG once.
• Step 6: Lower EA/VPP from VPP to VCC
Repeat step 2 through 6 changing the address and data for the entire array or until the end of
the object file is reached (See Figure 9-2).
9.3.4
Verify algorithm
Code array verify must be done after each byte or block of bytes is programmed. In either case,
a complete verify of the programmed array will ensure reliable programming of the
TS87C51RB2/RC2/RD2.
P 2.7 is used to enable data output.
To verify the TS87C51RB2/RC2/RD2 code the following sequence must be exercised:
• Step 1: Activate the combination of program and control signals.
• Step 2: Input the valid address on the address lines.
• Step 3: Read data on the data lines.
Repeat step 2 through 3 changing the address for the entire array verification (See Figure 9-2.)
55
4188E–8051–08/06
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