AT91M40400 View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'AT91M40400' PDF : 116 Pages View PDF
USART: Universal Synchronous/Asynchronous Receiver/Transmitter
The AT91M40400 provides two identical, full-duplex, uni-
versal synchronous/asynchronous receiver/transmitters
that interface to the APB and are connected to the Periph-
eral Data Controller.
The main features are:
• Programmable Baud Rate Generator
• Parity, Framing and Overrun Error Detection
• Line Break Generation and Detection
• Automatic Echo, Local Loopback and Remote Loopback
channel modes
• Multi-drop Mode: Address Detection and Generation
• Interrupt Generation
• Two Dedicated Peripheral Data Controller channels
• 5-, 6-, 7- and 8-bit character length
Figure 34. USART Block Diagram
ASB
AMBA
APB
Peripheral Data Controller
Receiver Transmitter
Channel
Channel
Control Logic
USART Channel
Receiver
PIO:
Parallel
I/O
Controller
RXD
USxIRQ
Interrupt Control
MCKI
MCKI/8
Baud Rate Generator
Baud Rate Clock
Transmitter
TXD
SCK
Pin Description
Each USART channel has the following external signals:
Name
SCK
TXD
RXD
Description
USART Serial clock can be configured as input or output:
SCK is configured as input if an External clock is selected (USCLKS[1] = 1)
SCK is driven as output if the External Clock is disabled (USCLKS[1] = 0) and Clock output is enabled (CLKO = 1)
Transmit Serial Data is an output
Receive Serial Data is an input
Note: After a hardware reset, the USART pins are not
enabled by default (see PIO: Parallel I/O Controller on
page 50). The user must configure the PIO Controller
before enabling the transmitter or receiver.
If the user selects one of the internal clocks, SCK can be
configured as a PIO.
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AT91M40400
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