AT91M40400 View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'AT91M40400' PDF : 116 Pages View PDF
AT91M40400
Baud Rate Generator
The Baud Rate Generator provides the bit period clock (the
Baud Rate clock) to both the Receiver and the Transmitter.
The Baud Rate Generator can select between external and
internal clock sources. The external clock source is SCK.
The internal clock sources can be either the master clock
MCKI or the master clock divided by 8 (MCKI/8).
Note: In all cases, if an external clock is used, the duration
of each of its levels must be longer than the system clock
(MCKI) period. The external clock frequency must be at
least 2.5 times lower than the system clock.
When the USART is programmed to operate in Asynchro-
nous Mode (SYNC = 0 in the Mode Register US_MR), the
selected clock is divided by 16 times the value (CD) written
in US_BRGR (Baud Rate Generator Register). If
US_BRGR is set to 0, the Baud Rate Clock is disabled.
Baud Rate = Selected Clock
16 x CD
When the USART is programmed to operate in Synchro-
nous Mode (SYNC = 1) and the selected clock is internal
(USCLKS[1] = 0 in the Mode Register US_MR), the Baud
Rate Clock is the internal selected clock divided by the
value written in US_BRGR. If US_BRGR is set to 0, the
Baud Rate Clock is disabled.
Baud Rate =
Selected Clock
CD
In Synchronous Mode with external clock selected
(USCLKS[1] = 1), the clock is provided directly by the sig-
nal on the SCK pin. No division is active. The value written
in US_BRGR has no effect.
Figure 35. Baud Rate Generator
USCLKS [0]
MCKI
MCKI/8
SCK
USCLKS [1]
CD
0
CD
0
1
CLK
16-Bit Counter
OUT
1
>1
1
0
0
0
1
SYNC
USCLKS [1]
SYNC
Divide
by 16
0
1
Baud Rate
Clock
65
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