Qdatasheet_Logo
Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site

ATA6612C View Datasheet(PDF) - Atmel Corporation

Part Name
Description
MFG CO.
'ATA6612C' PDF : 312 Pages View PDF
3.3.20.3 Sleep Mode
A falling edge at EN when TXD is low switches the IC into sleep mode. The TXD signal has to be logic low during the mode
select window (Figure 3-5). In order to avoid any influence to the LIN-pin during switching into sleep mode it is possible to
switch the EN up to 3.2µs earlier to LOW than the TXD. Therefore, the best and easiest way are two falling edges at TXD
and EN at the same time.The transmission path is disabled in sleep mode. The supply current IVSsleep from VBatt is typically
10µA.
The VCC regulator and the INH output are switched off. NRES and RXD are low. The internal slave termination between the
LIN pin and VS pin is disabled, only a weak pull-up current (typically 10µA) between the LIN pin and the VS pin is present.
sleep mode can be activated independently from the current level on the LIN, WAKE, or KL_15 pin.
A voltage lower than the LIN pre_wake detection VLINL at the LIN pin activates the internal LIN receiver and switches on the
internal slave termination between the LIN pin and the VS pin.
A falling edge at the LIN pin followed by a dominant bus level maintained for a certain time period (> tbus) and followed by a
rising edge at pin LIN results in a remote wake-up request. The device switches from sleep mode to fail-safe mode.
The VCC regulator is activated, and the remote wake-up request is indicated by a low level at the RXD pin to interrupt the
microcontroller (see Figure 3-6 on page 15).
EN high can be used to switch directly from sleep/silent to fail-safe mode. If EN is still high after VCC ramp up and under
voltage reset time, the IC switches to the normal mode.
Figure 3-5. Switch to Sleep Mode
Normal Mode
Sleep Mode
EN
TXD
NRES
VCC
Mode select window
td = 3.2μs
Delay time sleep mode
td_sleep = maximum 20μs
LIN
LIN switches directly to recessive mode
3.3.20.4 Fail-safe Mode
The device automatically switches to fail-safe mode at system power-up and the voltage regulator is switched on
(see Figure 3-7 on page 17). The NRES output switches to low for tres = 4ms and gives a reset to the microcontroller. LIN
communication is switched off. The IC stays in this mode until EN is switched to high. The IC then changes to normal mode.
A power down of VBatt (VS < 4V) during silent or sleep mode switches the IC into fail-safe mode. A low at NRES switches into
fail-safe mode directly. During fail-safe mode the TXD pin is an output and signals the last wake-up source.
14 ATA6612C/ATA6613C [DATASHEET]
9111L–AUTO–11/14
Share Link: GO URL

All Rights Reserved © qdatasheet.com  [ Privacy Policy ] [ Contact Us ]