ATA6612C View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
ATA6612C
Atmel Corporation
'ATA6612C' PDF : 312 Pages View PDF
5.5.3.2 The EEPROM Address Register – EEARH and EEARL
Bit
Read/Write
Initial Value
15
–
EEAR7
7
R
R/W
0
X
14
–
EEAR6
6
R
R/W
0
X
13
–
EEAR5
5
R
R/W
0
X
12
–
EEAR4
4
R
R/W
0
X
11
–
EEAR3
3
R
R/W
0
X
10
–
EEAR2
2
R
R/W
0
X
9
–
EEAR1
1
R
R/W
0
X
8
EEAR8
EEAR0
0
R/W
R/W
X
X
EEARH
EEARL
• Bits 15..9 – Res: Reserved Bits
These bits are reserved bits in the Atmel® ATA6612C/ATA6613C and will always read as zero.
• Bits 8..0 – EEAR8..0: EEPROM Address
The EEPROM address registers – EEARH and EEARL specify the EEPROM address in the 512 bytes EEPROM space. The
EEPROM data bytes are addressed linearly between 0 and 255/511/511. The initial value of EEAR is undefined. A proper
value must be written before the EEPROM may be accessed.
5.5.3.3 The EEPROM Data Register – EEDR
Bit
7
6
5
4
3
2
1
0
MSB
LSB
EEDR
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0
• Bits 7..0 – EEDR7.0: EEPROM Data
For the EEPROM write operation, the EEDR register contains the data to be written to the EEPROM in the address given by
the EEAR register. For the EEPROM read operation, the EEDR contains the data read out from the EEPROM at the address
given by EEAR.
5.5.3.4 The EEPROM Control Register – EECR
Bit
7
–
Read/Write
R
Initial Value
0
6
5
4
3
2
1
0
–
EEPM1 EEPM0 EERIE EEMPE EEPE EERE
EECR
R
R/W
R/W
R/W
R/W
R/W
R/W
0
X
X
0
0
X
0
• Bits 7..6 – Res: Reserved Bits
These bits are reserved bits in the Atmel ATA6612C/ATA6613C and will always read as zero
• Bits 5, 4 – EEPM1 and EEPM0: EEPROM Programming Mode Bits
The EEPROM programming mode bit setting defines which programming action that will be triggered when writing EEPE. It
is possible to program data in one atomic operation (erase the old value and program the new value) or to split the erase and
write operations in two different operations.
The programming times for the different modes are shown in Table 5-2 on page 42. While EEPE is set, any write to EEPMn
will be ignored. During reset, the EEPMn bits will be reset to 0b00 unless the EEPROM is busy programming.
ATA6612C/ATA6613C [DATASHEET]
41
9111L–AUTO–11/14
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