ATA6612C View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
ATA6612C
Atmel Corporation
'ATA6612C' PDF : 312 Pages View PDF
5.5.4 I/O Memory
The I/O space definition of the Atmel® ATA6612C/ATA6613C is shown in Section 6.4 “Register Summary” on page 291.
All Atmel ATA6612C/ATA6613C I/Os and peripherals are placed in the I/O space. All I/O locations may be accessed by the
LD/LDS/LDD and ST/STS/STD instructions, transferring data between the 32 general purpose working registers and the I/O
space. I/O registers within the address range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In
these registers, the value of single bits can be checked by using the SBIS and SBIC instructions. Refer to the instruction set
section for more details. When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used.
When addressing I/O registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The
Atmel ATA6612C/ATA6613C is a complex microcontroller with more peripheral units than can be supported within the 64
location reserved in opcode for the IN and OUT instructions. For the extended I/O space from 0x60 - 0xFF in SRAM, only the
ST/STS/STD and LD/LDS/LDD instructions can be used.
For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses
should never be written. Some of the status flags are cleared by writing a logical one to them. Note that, unlike most other
AVR®s, the CBI and SBI instructions will only operate on the specified bit, and can therefore be used on registers containing
such status flags. The CBI and SBI instructions work with registers 0x00 to 0x1F only. The I/O and peripherals control
registers are explained in later sections.
5.5.4.1 General Purpose I/O Registers
The Atmel ATA6612C/ATA6613C contains three general purpose I/O registers. These registers can be used for storing any
information, and they are particularly useful for storing global variables and status flags. General purpose I/O registers within
the address range 0x00 - 0x1F are directly bit-accessible using the SBI, CBI, SBIS, and SBIC instructions.
5.5.4.2 General Purpose I/O Register 2 – GPIOR2
Bit
7
6
5
4
3
2
1
0
MSB
LSB GPIOR2
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0
5.5.4.3 General Purpose I/O Register 1 – GPIOR1
Bit
7
6
5
4
3
2
1
0
MSB
LSB GPIOR1
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0
5.5.4.4 General Purpose I/O Register 0 – GPIOR0
Bit
7
6
5
4
3
2
1
0
MSB
LSB GPIOR0
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0
ATA6612C/ATA6613C [DATASHEET]
45
9111L–AUTO–11/14
Share Link: 