ATA6617 View Datasheet(PDF) - Atmel Corporation
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Description
MFG CO.
ATA6617
Atmel Corporation
'ATA6617' PDF : 308 Pages View PDF
Atmel ATA6616/ATA6617
4.4.4
I/O Memory
The I/O space definition of the Atmel® ATtiny87/167 is shown in Section 4.26 “Register Sum-
mary” on page 290.
All Atmel ATtiny87/167 I/Os and peripherals are placed in the I/O space. All I/O locations may
be accessed by the LD/LDS/LDD and ST/STS/STD instructions, transferring data between the
32 general purpose working registers and the I/O space. I/O Registers within the address
range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In these reg-
isters, the value of single bits can be checked by using the SBIS and SBIC instructions. Refer
to the instruction set section for more details. When using the I/O specific commands IN and
OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data
space using LD and ST instructions, 0x20 must be added to these addresses. The Atmel
ATtiny87/167 is a complex microcontroller with more peripheral units than can be supported
within the 64 location reserved in Opcode for the IN and OUT instructions. For the Extended
I/O space from 0x60 - 0xFF in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can
be used.
For compatibility with future devices, reserved bits should be written to zero if accessed.
Reserved I/O memory addresses should never be written.
Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most
other AVRs, the CBI and SBI instructions will only operate on the specified bit, and can there-
fore be used on registers containing such Status Flags. The CBI and SBI instructions work
with registers 0x00 to 0x1F only.
The I/O and Peripherals Control Registers are explained in later sections.
4.4.4.1
General Purpose I/O Registers
The Atmel® ATtiny87/167 contains three General Purpose I/O Registers. These registers can
be used for storing any information, and they are particularly useful for storing global variables
and Status Flags.
The General Purpose I/O Registers within the address range 0x00 - 0x1F are directly
bit-accessible using the SBI, CBI, SBIS, and SBIC instructions.
4.4.5 Register Description
4.4.5.1
EEARH and EEARL – EEPROM Address Register
Bit
Bit
Read/Write
Read/Write
Initial Value
Initial Value
7
-
EEAR7
7
R
R/W
0
X
6
-
EEAR6
6
R
R/W
0
X
5
-
EEAR5
5
R
R/W
0
X
4
-
EEAR4
4
R
R/W
0
X
3
-
EEAR3
3
R
R/W
0
X
2
-
EEAR2
2
R
R/W
0
X
1
-
EEAR1
1
R
R/W
0
X
0
EEAR8
EEAR0
0
R/W
R/W
X
X
EEARH
EEARL
• Bit 7:1 – Reserved Bits
These bits are reserved for future use and will always read as 0 in Atmel® ATtiny87/167.
45
9132D–AUTO–12/10
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