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ATA6617 View Datasheet(PDF) - Atmel Corporation

Part Name
Description
MFG CO.
'ATA6617' PDF : 308 Pages View PDF
4.5 System Clock and Clock Options
The Atmel® ATtiny87/167 provides a large number of clock sources. They can be divided into
two categories: internal and external. Some external clock sources can be shared with the
asynchronous timer. After reset, the clock source is determined by the CKSEL Fuses. Once
the device is running, software clock switching is possible to any other clock sources.
Hardware controls are provided for clock switching management but some specific proce-
dures must be observed. Clock switching should be performed with caution as some settings
could result in the device having an incorrect configuration.
4.5.1
Clock Systems and their Distribution
Figure 4-10 presents the principal clock systems in the AVR® and their distribution. All of the
clocks may not need to be active at any given time. In order to reduce power consumption, the
clocks to modules not being used can be halted by using different sleep modes or by using
features of the dynamic clock switch circuit (See Section 4.6 “Power Management and Sleep
Modes” on page 65 and “Dynamic Clock Switch” on page 55). The clock systems are detailed
below.
Figure 4-10. Clock Distribution
Asynchronous
Timer/Counter0
GMenoedrualleIs/O
ADC
CPU Core
RAM
Flash and
EEPROM
clkI/O
clkASY
clkADC
AVR Clock
Control Unit
clkCPU
clkFLASH
Reset Logic
Watchdog Timer
Source Clock
Prescaler
Watchdog Clock
Clock Switch
Multiplexer
CKOUT
Fuse
External Clock
Low-frequency
Crystal Oscillator
Watchdog
Oscillator
Crystal
Oscillator
Calibrated RC
Oscillator
PB4 / XTAL1 / CLKI
PB5 / XTAL2 / CLKO
48 Atmel ATA6616/ATA6617
9132D–AUTO–12/10
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