ATEMGA128L View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'ATEMGA128L' PDF : 395 Pages View PDF
Power Management
and Sleep Modes
MCU Control Register –
MCUCR
Sleep modes enable the application to shut down unused modules in the MCU, thereby
saving power. The AVR provides various sleep modes allowing the user to tailor the
power consumption to the application’s requirements.
To enter any of the six sleep modes, the SE bit in MCUCR must be written to logic one
and a SLEEP instruction must be executed. The SM2, SM1, and SM0 bits in the
MCUCR Register select which sleep mode (Idle, ADC Noise Reduction, Power-down,
Power-save, Standby, or Extended Standby) will be activated by the SLEEP instruction.
See Table 17 for a summary. If an enabled interrupt occurs while the MCU is in a sleep
mode, the MCU wakes up. The MCU is then halted for four cycles in addition to the
start-up time, it executes the interrupt routine, and resumes execution from the instruc-
tion following SLEEP. The contents of the register file and SRAM are unaltered when
the device wakes up from sleep. If a reset occurs during sleep mode, the MCU wakes
up and executes from the Reset Vector.
Figure 18 on page 36 presents the different clock systems in the ATmega128, and their
distribution. The figure is helpful in selecting an appropriate sleep mode.
The MCU Control Register contains control bits for power management.
Bit
Read/Write
Initial Value
7
6
5
SRE SRW10
SE
R/W
R/W
R/W
0
0
0
4
SM1
R/W
0
3
SM0
R/W
0
2
SM2
R/W
0
1
IVSEL
R/W
0
0
IVCE
R/W
0
MCUCR
• Bit 5 – SE: Sleep Enable
The SE bit must be written to logic one to make the MCU enter the Sleep mode when
the SLEEP instruction is executed. To avoid the MCU entering the Sleep mode unless it
is the programmers purpose, it is recommended to write the Sleep Enable (SE) bit to
one just before the execution of the SLEEP instruction and to clear it immediately after
waking up.
• Bits 4..2 – SM2..0: Sleep Mode Select Bits 2, 1, and 0
These bits select between the six available sleep modes as shown in Table 17.
Table 17. Sleep Mode Select
SM2
SM1
SM0
Sleep Mode
0
0
0
Idle
0
0
1
ADC Noise Reduction
0
1
0
Power-down
0
1
1
Power-save
1
0
0
Reserved
1
0
1
Reserved
1
1
0
Standby(1)
1
1
1
Extended Standby(1)
Note: 1. Standby mode and Extended Standby mode are only available with external crystals
or resonators.
44 ATmega128
2467O–AVR–10/06
Share Link: 
