ATEMGA128L View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'ATEMGA128L' PDF : 395 Pages View PDF
asynchronous timer should be considered undefined after wake-up in Power-save mode
if AS0 is 0.
This sleep mode basically halts all clocks except clkASY, allowing operation only of asyn-
chronous modules, including Timer/Counter0 if clocked asynchronously.
Standby Mode
When the SM2..0 bits are 110 and an External Crystal/Resonator clock option is
selected, the SLEEP instruction makes the MCU enter Standby mode. This mode is
identical to Power-down with the exception that the Oscillator is kept running. From
Standby mode, the device wakes up in 6 clock cycles.
Extended Standby Mode
When the SM2..0 bits are 111 and an external crystal/resonator clock option is selected,
the SLEEP instruction makes the MCU enter Extended Standby mode. This mode is
identical to Power-save mode with the exception that the Oscillator is kept running.
From Extended Standby mode, the device wakes up in six clock cycles.
Table 18. Active Clock Domains and Wake Up Sources in the Different Sleep Modes
Active Clock Domains
Oscillators
Wake Up Sources
Sleep
Mode
Idle
Main Clock
Source
clkCPU clkFLASH clkIO clkADC clkASY Enabled
XX
X
X
Timer
Osc
Enabled
X(2)
INT7:0
X
TWI
Address
Match
X
Timer 0
X
SPM/
EEPROM
Ready
X
ADC
Noise
Reduction
X
X
X
X(2)
X(3)
X
X
X
Power-
down
X(3)
X
Power-
save
Standby(1)
X(2)
X(2)
X(3)
X
X(2)
X
X(3)
X
Extended
Standby(1)
X(2)
X
X(2)
X(3)
X
X(2)
Notes: 1. External Crystal or resonator selected as clock source
2. If AS0 bit in ASSR is set
3. Only INT3:0 or level interrupt INT7:4
Other
ADC I/O
XX
X
46 ATmega128
2467O–AVR–10/06
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