ATF-521P8-BLK View Datasheet(PDF) - Avago Technologies
Part Name
Description
MFG CO.
ATF-521P8-BLK
Avago Technologies
'ATF-521P8-BLK' PDF : 23 Pages View PDF
Using the 3GPP standards document Release 1999 ver‑
sion 2002-6, the following channel configuration was
used to test ACLR. This table contains the power levels
of the main channels used for Test Model 1. Note that
the DPCH can be made up of 16, 32, or 64 separate
channels each at different power levels and timing off‑
sets. For a listing of power levels, channelization codes
and timing offset see the entire 3GPP TS 25.141 V3.10.0
(2002-06) standards document at: http://www.3gpp.
org/specs/specs.htm
3GPP TS 25.141 V3.10.0 (2002-06) Type
Pwr (dB)
P-CCPCH+SCH -10
Primary CPICH -10
PICH -18
S-CCPCH containing PCH (SF=256) -18
DPCH-64ch (SF=128) -1.1
Table 3. ACLR Channel Power Configuration.
Thermal Design
When working with medium to high power FET devices,
thermal dissipation should be a large part of the design.
This is done to ensure that for a given ambient tem‑
perature the transistor’s channel does not exceed the
maximum rating, TCH, on the data sheet. For example,
ATF‑521P8 has a maximum channel temperature of
150°C and a channel to board thermal resistance of
45°C/W, thus the entire thermal design hinges from
these key data points. The question that must be an‑
swered is whether this device can operate in a typical
environment with ambient temperature fluctuations
from -25°C to 85°C. From Figure 19, a very useful equa‑
tion is derived to calculate the temperature of the chan‑
nel for a given ambient temperature. These calculations
are all incorporated into Avago Technologies AppCAD.
θch-b
θb-s
Tch
(channel)
Tb (board
or belly
of the part)
Ts (sink)
θs-a
Ta (ambient)
Figure 19. Equivalent Circuit for Thermal Resistance.
where,
θ
b
–a
is
the
board
to
ambient
thermal
resistance;
θch–b is the channel to board thermal resistance.
The board to ambient thermal resistance thus becomes
very important for this is the designer’s major source of
heat control. To demonstrate the influence of θb-a, ther‑
mal resistance is measured for two very different sce‑
narios using the ATF-521P8 demoboard. The first case
is done with just the demoboard by itself. The second
case is the ATF demoboard mounted on a chassis or
metal casing, and the results are given below:
ATF Demoboard
θb-a
PCB 1/8" Chassis
10.4°C/W
PCB no HeatSink
32.9°C/W
Table 4. Thermal resistance measurements.
Therefore calculating the temperature of the channel
for these two scenarios gives a good indication of what
type of heat sinking is needed.
Case 1: Chassis Mounted @ 85°C
Tch = P x (θch-b + θb-a) + Ta
=.9W x (45+10.4)°C/W +85°C
Tch = 135°C
Case 2: No Heatsink @ 85°C
Tch = P x (θch-b + θb-a) + Ta
=.9W x (45+32.9)°C/W + 85°C
Tch = 155°C
In other words, if the board is mounted to a chassis, the
channel temperature is guaranteed to be 135°C safely
below the 150°C maximum. But on the other hand, if
no
heat
sinking
is
used
and
the
θ
b-a
is
above
27°C/W
(32.9°C/W in this case), then the power must be derated
enough to lower the temperature below 150°C. This can
be better understood with Figure 20 below. Note power
is derated at 13 mW/°C for the board with no heat sink
and no derating is required for the chassis mounted
board until an ambient temperature of 100°C.
Pdiss
(W)
Hence very similar to Ohms Law, the temperature of the
channel is calculated with equation 8 below.
TCH
=
Pdiss
(θch–b
+
θ
b–s
+
θ
s– a
)
+ Tamb
(8)
If no heat sink is used or heat sinking is incorporated
into the PCB board then equation 8 may be reduced to:
TCH = Pdiss (θch–b + θb–a ) + Tamb (9)
20
0.9W
Mounted on Chassis
(18 mW/°C)
No Heatsink
(13 mW/°C)
0
81 100 150 Tamb (°C)
Figure 20. Derating for ATF- 521P8.
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