ATMEGA261 View Datasheet(PDF) - Atmel Corporation
Part Name
Description
MFG CO.
'ATMEGA261' PDF : 226 Pages View PDF
ATtiny261/ATtiny461/ATtiny861
14. Timer/Counter0
14.1 Features
• Clear Timer on Compare Match (Auto Reload)
• Input Capture unit
• Four Independent Interrupt Sources (TOV0, OCF0A, OCF0B, ICF0)
• 8-bit Mode with Two Independent Output Compare Units
• 16-bit Mode with One Independent Output Compare Unit
14.2 Overview
Timer/Counter0 is a general purpose 8-/16-bit Timer/Counter module, with two/one Output Com-
pare units and Input Capture feature.
The Timer/Counter0 general operation is described in 8-/16-bit mode. A simplified block diagram
of the 8-/16-bit Timer/Counter is shown in Figure 14-1. For the actual placement of I/O pins, refer
to “Pinout ATtiny261/461/861” on page 2. CPU accessible I/O Registers, including I/O bits and
I/O pins, are shown in bold. The device-specific I/O Register and bit locations are listed in the
“Register Description” on page 85.
Figure 14-1. 8-/16-bit Timer/Counter Block Diagram
Count
Clear
Direction
Control Logic
clkTn
Timer/Counter
TCNTnH
TCNTnL
TOP
=
TOVn (Int. Req.)
Clock Select
Edge
Detector
Tn
( From Prescaler )
=
OCRnB
=
OCRnA
TCCRnA
TCCRnB
Edge
Detector
Fixed TOP value
OCnA (Int. Req.)
OCnB (Int. Req.)
ICFn (Int. Req.)
( From Analog
Comparator Ouput )
Noise
Canceler
ICPn
14.2.1 Registers
The Timer/Counter0 Low Byte Register (TCNT0L) and Output Compare Registers (OCR0A and
OCR0B) are 8-bit registers. Interrupt request (abbreviated to Int.Req. in Figure 14-1) signals are
all visible in the Timer Interrupt Flag Register (TIFR). All interrupts are individually masked with
the Timer Interrupt Mask Register (TIMSK). TIFR and TIMSK are not shown in the figure.
In 16-bit mode the Timer/Counter consists one more 8-bit register, the Timer/Counter0 High
Byte Register (TCNT0H). Furthermore, there is only one Output Compare Unit in 16-bit mode as
the two Output Compare Registers, OCR0A and OCR0B, are combined to one 16-bit Output
Compare Register.
73
7753E–AVR–06/10
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