Figure 14-6. Timer/Counter Timing Diagram, with Prescaler (fclk_I/O/8)
clkI/O
clkTn
(clkI/O/8)
TCNTn
MAX - 1
MAX
BOTTOM
TOVn
BOTTOM + 1
Figure 14-7 shows the setting of OCF0A and OCF0B in Normal mode.
Figure 14-7. Timer/Counter Timing Diagram, Setting of OCF0x, with Prescaler (fclk_I/O/8)
clkI/O
clkTn
(clkI/O/8)
TCNTn
OCRnx - 1
OCRnx
OCRnx + 1
OCRnx + 2
OCRnx
OCRnx Value
OCFnx
shows the setting of OCF0A and the clearing of TCNT0 in CTC mode.
Figure 14-8. Timer/Counter Timing Diagram, CTC mode, with Prescaler (fclk_I/O/8)
clkPCK
clkTn
(clkPCK /8)
TCNTn
(CTC)
TOP - 1
TOP
BOTTOM
BOTTOM + 1
OCRnx
TOP
OCFnx
80 ATtiny261/ATtiny461/ATtiny861
7753E–AVR–06/10