ATMEGA64RZAV-10PU View Datasheet(PDF) - Atmel Corporation
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MFG CO.
ATMEGA64RZAV-10PU
Atmel Corporation
'ATMEGA64RZAV-10PU' PDF : 377 Pages View PDF
6.2 SRAM Data Memory
Figure 6-2 on page 18 shows how the ATmega644 SRAM Memory is organized.
The ATmega644 is a complex microcontroller with more peripheral units than can be supported
within the 64 location reserved in the Opcode for the IN and OUT instructions. For the Extended
I/O space from $060 - $0FF in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can
be used.
The first 4,352 Data Memory locations address both the Register File, the I/O Memory,
Extended I/O Memory, and the internal data SRAM. The first 32 locations address the Register
file, the next 64 location the standard I/O Memory, then 160 locations of Extended I/O memory
and the next 4,096 locations address the internal data SRAM.
The five different addressing modes for the data memory cover: Direct, Indirect with Displace-
ment, Indirect, Indirect with Pre-decrement, and Indirect with Post-increment. In the Register file,
registers R26 to R31 feature the indirect addressing pointer registers.
The direct addressing reaches the entire data space.
The Indirect with Displacement mode reaches 63 address locations from the base address given
by the Y- or Z-register.
When using register indirect addressing modes with automatic pre-decrement and post-incre-
ment, the address registers X, Y, and Z are decremented or incremented.
The 32 general purpose working registers, 64 I/O registers, 160 Extended I/O Registers and the
4096 bytes of internal data SRAM in the ATmega644 are all accessible through all these
addressing modes. The Register File is described in ”General Purpose Register File” on page
12.
Figure 6-2. Data Memory Map
Data Memory
32 Registers
64 I/O Registers
160 Ext I/O Reg.
Internal SRAM
(4096 x 8)
$0000 - $001F
$0020 - $005F
$0060 - $00FF
$0100
$10FF
18 ATmega644
2593O–AVR–02/12
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