ATSAMA5D41A-CU View Datasheet(PDF) - Atmel Corporation

Part Name

Description

MFG CO.

ATSAMA5D41A-CU

SMART ARM-based Embedded MPU

Atmel Corporation 

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13.5.13 L2CC Masked Interrupt Status Register

Name:

L2CC_MISR

Address: 0x00A00218

Access: Read-only

31

30

29

28

–

–

–

–

23

22

21

20

–

–

–

–

15

14

13

12

–

–

–

–

7

SLVERR

6

ERRRD

5

ERRRT

4

ERRWD

• ECNTR: Event Counter 1/0 Overflow Increment

• PARRT: Parity Error on L2 Tag RAM, Read

• PARRD: Parity Error on L2 Data RAM, Read

• ERRWT: Error on L2 Tag RAM, Write

• ERRWD: Error on L2 Data RAM, Write

• ERRRT: Error on L2 Tag RAM, Read

• ERRRD: Error on L2 Data RAM, Read

• SLVERR: SLVERR from L3 memory

• DECERR: DECERR from L3 memory

27

–

19

–

11

–

3

ERRWT

0: No interrupt has been generated or the interrupt is masked.

1: The input lines have triggered an interrupt.

26

–

18

–

10

–

2

PARRD

25

–

17

–

9

–

1

PARRT

24

–

16

–

8

DECERR

0

ECNTR

104

SAMA5D4 Series [DATASHEET]

Atmel-11238C-ATARM-SAMA5D4-Datasheet_12-Jul-16

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