13.5.16 L2CC Cache Synchronization Register
Name:
L2CC_CSR
Address: 0x00A00730
Access: Read/Write
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
–
23
22
21
20
19
18
17
16
–
–
–
–
–
–
–
–
15
14
13
12
11
10
9
8
–
–
–
–
–
–
–
–
7
6
5
4
3
2
1
0
–
–
–
–
–
–
–
C
• C: Cache Synchronization Status
0: No background operation is in progress. When written, must be zero.
1: A background operation is in progress.
SAMA5D4 Series [DATASHEET]
Atmel-11238C-ATARM-SAMA5D4-Datasheet_12-Jul-16
107