ATSAMA5D41A-CU View Datasheet(PDF) - Atmel Corporation

Part Name

Description

MFG CO.

ATSAMA5D41A-CU

SMART ARM-based Embedded MPU

Atmel Corporation 

Prev 111 112 113 114 115 116 117 118 119 120 Next

13.5.27 L2CC Debug Control Register

Name:

L2CC_DCR

Address: 0x00A00F40

Access: Read/Write in Secure mode

Read-only in Non-secure mode

31

30

29

28

27

26

25

24

–

–

–

–

–

–

–

–

23

22

21

20

19

18

17

16

–

–

–

–

–

–

–

–

15

14

13

12

11

10

9

8

–

–

–

–

–

–

–

–

7

6

5

4

3

2

1

0

–

–

–

–

–

SPNIDEN

DWB

DCL

• DCL: Disable Cache Linefill

0: Enables cache linefills. This is the default value.

1: Disables cache linefills.

• DWB: Disable Write-back, Force Write-through

0: Enables write-back behavior. This is the default value.

1: Forces write-through behavior.

• SPNIDEN: SPNIDEN Value

Reads value of the SPNIDEN input.

118

SAMA5D4 Series [DATASHEET]

Atmel-11238C-ATARM-SAMA5D4-Datasheet_12-Jul-16

Share Link: