ATSGA204A View Datasheet(PDF) - Microchip Technology
Part Name
Description
MFG CO.
'ATSGA204A' PDF : 93 Pages View PDF
ATSHA204A
Single-Wire Interface
significant part-to-part variability in its internal clock generator, due to normal manufacturing and
environmental fluctuations.
The bit timing is designed to permit a standard UART running at 230.4 kBaud to transmit and receive the
tokens efficiently. Each byte transmitted or received by the UART corresponds to a single bit received or
transmitted by the device. The UART needs to be configured with 7-bits of data having 0x7F
corresponding to a Logic 1 and 0x7D corresponding to a Logic 0.
The Wake token is special in that it requires an extra long low pulse of tWLO on the SDA pin (see Table
AC Parameters – All I/O Interfaces), which cannot be confused with the shorter low pulses that occur
during a Data token (Zero, One, ZeroOut, or OneOut). Devices that are in either the idle or sleep state
ignore all data tokens until they receive a legal Wake token. Do not send a Wake token to devices that
are awake, as they lose synchronization because the waveform can be resolved to neither a legal one
nor zero. See Section Synchronization Procedures for the procedure to regain synchronization.
5.2 I/O Flags
The system is always the bus master; so before any I/O transaction, the system must send an 8-bit flag to
the device to indicate the I/O operation to be subsequently performed, as shown in the table below.
Table 5-2. I/O Flags
Name
Value
Meaning
Sleep
(low-power)
0xCC
The ATSHA204A goes into the low-power sleep mode and ignores all subsequent I/O
transitions until the next Wake flag. The entire volatile state of the device is reset.
Idle
Command
0xBB
0x77
The ATSHA204A goes into the idle state and ignores all subsequent I/O transitions
until the next Wake flag. The contents of TempKey and RNG seed registers are
retained.
Write subsequent bytes to sequential addresses in the input command buffer.
Reserved
All Other
Values
These flags should not be sent to the device.
Transmit
0x88
Communicates to the device to wait for a bus turnaround time and then start
transmitting its response to the previously transmitted command block. When valid
data is in the output buffer, the transmit flag may be repeatedly issued to the device
to resend the buffer to the system.
Wake
See Interface Wake the device from low-power mode and reset the watchdog counter.
5.2.1
Transmit Flag
The transmit flag is used to turn the bus around so that the ATSHA204A can send data back to the
system. The bytes that the device returns to the system depend upon the current state of the device and
may include either status, error code, or command results.
When the device is busy executing a command, it ignores the SDA pin and any flags that are sent by the
system. See Section Command Opcodes, Short Descriptions and Execution Times for execution
delays in the device for each command type. The system must observe these delays before trying to
communicate with the device after sending a command.
© 2018 Microchip Technology Inc.
DS40002025A-page 23
Share Link: 
