C8051F067 View Datasheet(PDF) - Silicon Laboratories
Part Name
Description
MFG CO.
'C8051F067' PDF : 328 Pages View PDF
C8051F060/1/2/3/4/5/6/7
1.2. On-Chip Memory
The CIP-51 has a standard 8051 program and data address configuration. It includes 256 bytes of data
RAM, with the upper 128 bytes dual-mapped. Indirect addressing accesses the upper 128 bytes of general
purpose RAM, and direct addressing accesses the 128 byte SFR address space. The CIP-51 SFR
address space contains up to 256 SFR Pages. In this way, the CIP-51 MCU can accommodate the many
SFRs required to control and configure the various peripherals featured on the device. The lower
128 bytes of RAM are accessible via direct and indirect addressing. The first 32 bytes are addressable as
four banks of general purpose registers, and the next 16 bytes can be byte addressable or bit addressable.
The CIP-51 in the C8051F060/1/2/3/4/5/6/7 MCUs additionally has an on-chip 4 kB RAM block. The on-
chip 4 kB block can be addressed over the entire 64 k external data memory address range (overlapping
4 k boundaries). The C8051F060/2/4/6 also have an external memory interface (EMIF) for accessing off-
chip data memory or memory-mapped peripherals. External data memory address space can be mapped
to on-chip memory only, off-chip memory only, or a combination of the two (addresses up to 4 k directed to
on-chip, above 4 k directed to EMIF). The EMIF is also configurable for multiplexed or non-multiplexed
address/data lines.
The MCU’s program memory consists of 64 k (C8051F060/1/2/3/4/5) or 32 k (C8051F066/7) of Flash. This
memory may be reprogrammed in-system in 512 byte sectors, and requires no special off-chip program-
ming voltage. On the C8051F060/1/2/3/4/5, the 1024 bytes from addresses 0xFC00 to 0xFFFF are
reserved. There is also a single 128 byte Scratchpad Memory sector on all devices which may be used by
firmware for non-volatile data storage. See Figure 1.7 for the MCU system memory map.
PROGRAM/DATA MEMORY
(FLASH)
C8051F060/1/2/3/4/5
0x1007F
0x10000
0xFFFF
0xFC00
0xFBFF
Scrachpad Memory
(data only)
RESERVED
FLASH
(In-System
Programmable in 512
Byte Sectors)
0xFF
0x80
0x7F
0x30
0x2F
0x20
0x1F
0x00
0x0000
DATA MEMORY (RAM)
INTERNAL DATA ADDRESS SPACE
Upper 128 RAM
(Indirect Addressing
Only)
(Direct and Indirect
Addressing)
Bit Addressable
General Purpose
Registers
Special Function
Registers
(Direct Addressing Only)
0
1
2
3
Lower 128 RAM
(Direct and Indirect
Addressing)
Up To
256 SFR Pages
0x1007F
0x10000
0xFFFF
C8051F066/7
Scrachpad Memory
(data only)
RESERVED
0x8000
0x7FFF
FLASH
0x0000
(In-System
Programmable in 512
Byte Sectors)
EXTERNAL DATA ADDRESS SPACE
0xFFFF
Off-chip XRAM space
(C8051F060/2/4/6 Only)
0x1000
0x0FFF
0x0000
XRAM - 4096 Bytes
(accessable using MOVX
instruction)
Figure 1.7. On-Chip Memory Map
Rev. 1.2
27
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