C8051F327 View Datasheet(PDF) - Silicon Laboratories
Part Name
Description
MFG CO.
'C8051F327' PDF : 141 Pages View PDF
C8051F326/7
SFR Definition 6.13. PCON: Power Control
R/W
GF5
Bit7
R/W
GF4
Bit6
R/W
GF3
Bit5
R/W
GF2
Bit4
R/W
GF1
Bit3
R/W
GF0
Bit2
R/W
STOP
Bit1
R/W
IDLE
Bit0
Reset Value
00000000
SFR Address:
0x87
Bits7–2:
Bit1:
Bit0:
GF5-GF0: General Purpose Flags 5-0.
These are general purpose flags for use under software control.
STOP: Stop Mode Select.
Setting this bit will place the CIP-51 in Stop mode. This bit will always be read as 0.
1: CPU goes into Stop mode (internal oscillator stopped).
IDLE: Idle Mode Select.
Setting this bit will place the CIP-51 in Idle mode. This bit will always be read as 0.
1: CPU goes into Idle mode. (Shuts off clock to CPU, but clock to Timers, Interrupts, Serial
Ports, and USB0 are still active.)
56
Rev. 1.1
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