C8051T603 View Datasheet(PDF) - Silicon Laboratories

Part Name

Description

MFG CO.

C8051T603

Mixed Signal OTP EPROM MCU Family

Silicon Laboratories 

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C8051T600/1/2/3/4/5/6

4. QFN-11 Package Specifications

Figure 4.1. QFN-11 Package Drawing

Table 4.1. QFN-11 Package Dimensions

Dimension Min

Nom

Max

Dimension Min

Nom

Max

A

0.80

0.90

1.00

A1

0.03

0.07

0.11

A3

0.25 REF

b

0.18

0.25

0.30

D

3.00 BSC

D2

1.30

1.35

1.40

e

0.50 BSC

E

3.00 BSC

E2

2.20

2.25

2.30

L

0.45

0.55

0.65

aaa

—

—

0.15

bbb

—

—

0.15

ddd

—

—

0.05

eee

—

—

0.08

Notes:

1. All dimensions shown are in millimeters (mm) unless otherwise noted.

2. Dimensioning and Tolerancing per ANSI Y14.5M-1994.

3. This drawing conforms to the JEDEC Solid State Outline MO-243, variation VEED except for

custom features D2, E2, and L which are toleranced per supplier designation.

4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body

Components.

22

Rev. 1.2

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