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CAM35C44 View Datasheet(PDF) - SMSC -> Microchip

Part Name
Description
MFG CO.
'CAM35C44' PDF : 50 Pages View PDF
GPIOA Data Register
The GPIOA Data register GP02 contains the
data bits for the five general purpose I/O pins
(TABLE 32). The state of a GPIO pin can be
forced to the value contained its data register, or
the value in the data register can reflect the state
of the pin, depending on the state of the
direction and enable bits. The affects of the
GPx_DAT bits are summarized in TABLE 30.
GP02 can be accessed both in the configuration
state and the run state (see section REGISTER
ADDRESS MAP on page 16 and TABLE 29).
The default value of the GPIOA Data register
after power up is 00H. Bits[7:5] in the GPIOA
Data register are RESERVED.
TABLE 32 - GPIOA DATA REGISTER
D7 D6 D5
D4
D3
D2
D1
D0
DEFAULT
GP4_
GP3_
GP2_ GP1_ GP0_
0x00
GP02 R/W
RESERVED
DAT
DAT
DAT
DAT
DAT
GPIOA Direction Register
The GPIOA Direction register GP04 contains the
direction bits for the five general purpose I/O
pins (TABLE 33). The direction of a GPIO pin
depends upon the state of the direction bit and
the enable bit, but typically if the direction bit is
“1” the GPIO pin is an output; if the direction bit
is “0” the GPIO pin is an input.
The affects of the GPx_OUT bits are
summarized in TABLE 33. GP04 can be
accessed both in the configuration state and the
run state (see section REGISTER ADDRESS
MAP on page 16 and TABLE 29). The default
value of the GPIOA Direction register after
power up is 00H. Bits[7:5] in the GPIOA
Direction register are RESERVED.
TABLE 33 - GPIOA DIRECTION REGISTER
D7 D6 D5
D4
D3
D2
D1
D0 DEFAULT
GP4_ GP3_ GP2_ GP1_ GP0_
GP04 R/W
RESERVED
OUT OUT
OUT
OUT
OUT
0x00
35
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