CDH2D09 View Datasheet(PDF) - Maxim Integrated
Part Name
Description
MFG CO.
'CDH2D09' PDF : 44 Pages View PDF
PMIC with Integrated Charger and
Smart Power Selector for Handheld Devices
ELECTRICAL CHARACTERISTICS (continued)
(DC, USB, BVSET, UOK, DOK, LX_ unconnected; VTHM = VL/2, VPG_ = VAGND = 0V, VBAT = 4V, CEN = low, USUS = low, EN = high,
VPEN1 = VPEN2 = 3.3V, VPWM = 0V, COUT4 = 1µF, COUT5 = 1µF, CSYS = 10µF, PV1 = PV2 = PV3 = PV4 = PV5 = SYS, RDISET = 3kΩ,
RCISET = 3kΩ, CVL = 0.1µF, CCT = 0.15µF, CBP = 0.01µF, VFB1 = 1.1V, VFB2 = 1.1V, VFB3 = 1.1V, TA = -40°C to +85°C, unless other-
wise noted.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
BVSET Input-Voltage High
Internal BVSET Pullup Resistance
VUSB or VDC = 4.1V to 6.6V
VVL -
0.3
VVL +
V
0.3
52.5
kΩ
External BVSET Pulldown
Resistance for Midrange Voltage
RBVSET
45
50
55
kΩ
Note 2: Limits are 100% production tested at TA = +25°C. Limits over the operating temperature range are guaranteed through cor-
relation using statistical quality control (SQC) methods.
Note 3: The USB/DC current limit does not include the VL output current. See the VL Linear Regulator section for more information.
Note 4: Quiescent current excludes the energy needed for the REG1–REG5 external resistor-dividers. All typical operating charac-
teristics include the energy for the REG1–REG5 external resistor-dividers. For the circuit of Figure 1, the typical quiescent
current with DC and USB unconnected, EN = high, VBAT = 4V, and PWM = low is 175µA.
Note 5: The charger transitions from done to fast-charge mode at this BAT recharge threshold (Figure 7).
Note 6: The charger transitions from fast-charge to top-off mode at this top-off threshold (Figure 7).
Note 7: The maximum output current is guaranteed by correlation to the p-channel current-limit threshold, p-channel on-resistance,
n-channel on-resistance, oscillator frequency, input voltage range, and output voltage range. The parameter is stated for a
4.7µH inductor with 0.13Ω series resistance. See the Step-Down Converter Output Current section for more information.
Note 8: The step-down output voltages are 1% high with no load due to the load-line architecture. When calculating the external
resistor-dividers, use an FB_ voltage of 1.000V.
Note 9: Line regulation for the step-down converters is measured as ΔVOUT/ΔD, where D is the duty cycle (approximately
VOUT/VIN).
Note 10: The skip mode current threshold is the transition point between fixed-frequency PWM operation and skip mode operation.
The specification is given in terms of output load current for inductor values shown in the typical application circuits.
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