CL-PD6833-QC-A View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CL-PD6833-QC-A' PDF : 216 Pages View PDF
CL-PD6833
PCI-to-CardBus Host Adapter
Table 7-1. Index Registers (cont.)
Register Name
Gen Map 2 Start Address Low
Gen Map 2 Start Address High
Gen Map 2 End Address Low
Gen Map 2 End Address High
Gen Map 2 Offset Address Low
Gen Map 2 Offset Address High
I/O Index Value
Six-bit Value
20h
21h
22h
23h
24h
25h
ATA Control
26h
Scratchpad
27h
Gen Map 3 Start Address Low
28h
Gen Map 3 Start Address High
29h
Gen Map 3 End Address Low
2Ah
Gen Map 3 End Address High
2Bh
Gen Map 3 Offset Address Low
2Ch
Gen Map 3 Offset Address High
2Dh
Memory
Offset Value
820h
821h
822h
823h
824h
825h
826h
827h
828h
829h
82Ah
82Bh
82Ch
82Dh
Chapter
Chapter 10,
“GENERAL
WINDOW
MAPPING
REGISTERS”
Chapter 11,
“EXTENSION
REGISTERS”
–
Chapter 10,
“GENERAL
WINDOW
MAPPING
REGISTERS”
Page
125
126
127
128
123
124
138
–
125
126
127
128
123
124
June 1998
ADVANCE DATA BOOK v0.3
87
OPERATION REGISTERS
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