CL-PD6833-VC-A View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CL-PD6833-VC-A' PDF : 216 Pages View PDF
CL-PD6833
PCI-to-CardBus Host Adapter
9.1.2
System I/O Map 0–1 Start Address Low
Register Name: System I/O Map 0–1 Start Address Low
I/O Index: 08h, 0Ch
Memory Offset: 808h, 80Ch
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Register Per: socket
Register Compatibility Type: 365
Bit 2
Bit 1
Bit 0
Start Address 7:0
R/W:00000000
There are two separate System I/O Map Start Address Low registers, each with identical fields. These
registers are located at the following indexes:
Index (Socket A)
08h
0Ch
Register
System I/O Map 0 Start Address Low
System I/O Map 1 Start Address Low
Bits 7:0 — Start Address 7:0
This register contains the least-significant byte of the address that specifies where in the I/O space
the corresponding I/O map begins. I/O accesses that are equal to or above this address and equal
to or below the corresponding System I/O Map End Address are mapped into the I/O space of the
corresponding PC Card.
The most-significant byte is located in the System I/O Map 0–1 Start Address High register.
9.1.3
System I/O Map 0–1 Start Address High
Register Name: System I/O Map 0–1 Start Address High
I/O Index: 09h, 0Dh
Memory Offset: 809h, 80Dh
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Register Per: socket
Register Compatibility Type: 365
Bit 2
Bit 1
Bit 0
Start Address 15:8
R/W:00000000
There are two separate System I/O Map Start Address High registers, each with identical fields. These
registers are located at the following indexes:
Index (Socket A)
09h
0Dh
Register
System I/O Map 0 Start Address High
System I/O Map 1 Start Address High
Bits 7:0 — Start Address 15:8
This register contains the most-significant byte of the Start Address. See the description of the Start
Address field associated with bits 7:0 of the System I/O Map 0–1 Start Address Low register (on
page 107).
June 1998
ADVANCE DATA BOOK v0.3
WINDOW MAPPING REGISTERS
107
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