Qdatasheet_Logo
Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site

CL-PS7110-VC-A View Datasheet(PDF) - Cirrus Logic

Part Name
Description
MFG CO.
CL-PS7110-VC-A
Cirrus-Logic
Cirrus Logic Cirrus-Logic
'CL-PS7110-VC-A' PDF : 82 Pages View PDF
CL-PS7110
Low-Power System-on-a-Chip
2.2 Pin Description Conventions
Abbreviations used for signal directions in this section are listed below:
Abbreviations
I
O
I/O
Description
A pin that functions as an input only.
A pin that functions as an output only.
A pin that operates as an input or an output.
2.3 Pin Descriptions
Table 2-1. External Signal Functions
Function
Signal
Name
Signal
Description
Address and
Data Bus
Memory and
Expansion
Interface
Interrupts
D[0–31]
I/O 32-bit system data bus for DRAM, ROM, and memory-mapped expansion.
A[0–14]
O Least-significant 15 bits of system byte address during ROM and expansion cycles.
A[15]/
13-bit multiplexed DRAM word address during DRAM cycles or address bits 16 to 27
DRA[12]–
O of system byte address during ROM and expansion cycles.
A[27]/DRA[0]
NRAS[0–3] O DRAM RAS outputs to DRAM banks 0–3.
NCAS[0–3] O DRAM CAS outputs for bytes 0 to 3 within 32-bit word.
NMOE
O DRAM, ROM, and expansion output enable.
NMWE
O DRAM, ROM, and expansion write enable.
NCS[0–3]
O Expansion channel I/O strobes. Active-low SRAM-like chip selects for expansion.
CS[4–7]
O Expansion channel I/O strobes. Active-high SRAM-like chip selects for expansion
EXPRDY
I Expansion channel ready. External expansion drives this low to extend bus cycle.
WRITE
O Transfer direction: low during reads; high during writes from the CL-PS7110.
WORD
O
Word access enable. Driven high during word-wide cycles; low during byte-wide
cycles.
EXPCLK
O
Expansion clock output. Clock output at the same phase and speed as the CPU
clock. Free-running or active only during expansion I/O cycles.
MEDCHG
I Media changed input. Active-high door or expansion-change de-glitched input.
NEXTFIQ
I External active-low fast interrupt request input.
EINT[3]
I External active-high interrupt request input.
NEINT[1–2] I Two general-purpose, active-low interrupt inputs.
32
PIN INFORMATION
May 1997
DATA BOOK v1.5
Share Link: GO URL

All Rights Reserved © qdatasheet.com  [ Privacy Policy ] [ Contact Us ]