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CL-PS7110-VC-A View Datasheet(PDF) - Cirrus Logic

Part Name
Description
MFG CO.
CL-PS7110-VC-A
Cirrus-Logic
Cirrus Logic Cirrus-Logic
'CL-PS7110-VC-A' PDF : 82 Pages View PDF
CL-PS7110
Low-Power System-on-a-Chip
3. PROGRAMMING INTERFACE
3.1 Memory Map
The lower 2 Gbytes of the address space is allocated to ROM and expansion space; the upper Gbyte of
address space is allocated to DRAM. The remaining Gbyte, less 4K for internal registers, is not accessible
in the CL-PS7110. Program the MMU in the CL-PS7110 to generate an abort exception for access to this
area.
Internal peripherals are addressed through a set of internal memory locations, from hexadecimal address
8000.000–8000.0FFF, are known as the internal registers in the CL-PS7110.
Table 3-1 shows the mapping of the 4-Gbyte address range of the ARM710A microprocessor in the
CL-PS7110.
Table 3-1. Memory Map
F000.0000
E000.0000
D000.0000
C000.0000
8000.1000
8000.0000
7000.0000
6000.0000
5000.0000
4000.0000
3000.0000
2000.0000
1000.0000
0000.0000
DRAM BANK 3
DRAM BANK 2
DRAM BANK 1
DRAM BANK 0
NOT USED
INTERNAL REGISTERS
EXPANSION (CS7)
EXPANSION (CS6)
EXPANSION (CS5)
EXPANSION (CS4)
EXPANSION (CS3)
EXPANSION (CS2)
ROM BANK 1 CS1)
ROM BANK 0 (CS0)
256 MBYTES
256 MBYTES
256 MBYTES
256 MBYTES
~1 GBYTE
4 KBYTES
256 MBYTES
256 MBYTES
256 MBYTES
256 MBYTES
256 MBYTES
256 MBYTES
256 MBYTES
256 MBYTES
May 1997
DATA BOOK v1.5
39
PROGRAMMING INTERFACE
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