CL-PS7110-VI-A View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CL-PS7110-VI-A' PDF : 82 Pages View PDF
CL-PS7110
Low-Power System-on-a-Chip
INDEX
Numerics
208-pin VQFP package 75
208-pin VQFP pin diagram 31
A
abbreviations 9
acronyms 9
ARM710A
data sheet 12
microprocessor 11–13, 18–19, 28–29, 39, 44, 52, 71
World-Wide-Web site 12
B
buffer
I/O characteristics 70
bus conversion 48
bus width conversion 48
C
chip select address ranges
ROM mode 73
conventions
abbreviations 9
acronyms 9
numbers and units 10
D
DRAM controller 19
address mapping 20
refresh register 21, 49
E
EPB Test mode signal assignment 71
F
functional description
block diagram 11
overview 11
I
interface bus width 73
K
keyboard column drives 43
L
LCD controller 12–14, 19, 21, 30, 44, 52
See registers, LCD Control
M
memory interface
configuration registers 17, 47
memory map 39
reads 15
See also DRAM controller 19
writes 15
Microwire 2, 12, 21, 45
modes
16-bit I/O 48
4-bits-per-pixel 21
Burst 17
Debug 40, 44
Expansion Transfer 48
Free-running 23, 44
Hardware Test 70–74
Functional (EPB) Test 71
High-Z (System) Test 73
Oscillator and PLL Bypass 71
Oscillator and PLL Test 71
Pin Test 72
Test ROM 73
Idle 29
Page 12, 17, 49
timing 63–65
PCMCIA 18, 48
bus width 48
bus width field values 48
Pin Test 70
Prescale 23, 44
Self-refresh 27, 49
Standby 19, 27–29, 59
System Test (High-Z) 70
N
NPOR. See resets, asynchronous
NPWRFL. See resets, asynchronous
NSYSRES. See resets, asynchronous
NURESET. See resets, asynchronous
O
ordering information 76
May 1997
DATA BOOK v1.5
79
INDEX
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