CL10K30A View Datasheet(PDF) - Clear Logic
Part Name
Description
MFG CO.
'CL10K30A' PDF : 16 Pages View PDF
LIBERATOR CL10K30A
AC Electrical Specifications cont.
EAB Timing Parameters[5]
Symbol
Parameter
Speed: -1
Min Max
tEABDATA1
Delay from Data or Address to EAB for
Combinatorial Input
5.5
tEABDATA2
Delay from Data or Address to EAB for
Registered Input
1.1
tEABWE1 WE Delay to EAB for Combinatorial Input
2.4
Speed: -2
Min Max
6.5
1.3
2.8
Speed: -3
Min Max Unit
8.5
ns
1.8
ns
3.7
ns
tEABWE2 WE Delay to EAB for Registered Input
2.1
2.5
3.2
ns
tEABCLK EAB Register Clock Delay
0.0
0.0
0.2
ns
tEABCO EAB Register Clock-to-output Delay
1.7
2.0
2.6
ns
tEABBYPASS Bypass Register Delay
0.0
0.0
0.3
ns
tEABSU EAB Register Setup Time
1.2
1.4
1.9
ns
tEABH EAB Register Hold Time
0.1
0.1
0.3
ns
tAA Address Access Delay
4.2
5.0
6.5
ns
tWP Write Pulse Width
3.8
4.5
5.9
ns
tWDSU
Data Setup Time Before Falling Edge of
Write Pulse
0.1
0.1
0.2
ns
tWDH
Data Hold Time After Falling Edge of Write
Puls e
0.1
0.1
0.2
ns
tWASU
Address Setup Time Before Rising Edge of
Write Pulse
0.1
0.1
0.2
ns
tWAH
Address Hold After Falling Edge of Write
Puls e
0.1
0.1
0.2
ns
tWO Write Enable to Date Output Delay
3.7
4.4
6.4
ns
tDD Data-in to Date-out Delay
3.7
4.4
6.4
ns
tEABOUT Data-out Delay
0.0
0.1
0.6
ns
tEABCH Clock High Time
3.0
3.5
4.0
ns
tEABCL Clock Low Time
3.8
4.5
5.9
ns
10KA tbl 10C
Page 12
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