CLRC632 View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
MFG CO.
'CLRC632' PDF : 127 Pages View PDF
NXP Semiconductors
CLRC632
Standard multi-protocol reader solution
9.2 Memory organization of the EEPROM
Table 11. EEPROM memory organization diagram
Block
Byte
Position Address address
Access Memory content
0
0
00h to 0Fh R
product
information field
1
1
2
2
10h to 1Fh R/W
20h to 2Fh R/W
StartUp register
initialization file
3
3
4
4
5
5
6
6
7
7
30h to 3Fh R/W
40h to 4Fh R/W
50h to 5Fh R/W
60h to 6Fh R/W
70h to 7Fh R/W
register
initialization file
user data or
second
initialization
8
8
80h to 8Fh W
keys for Crypto1
9
9
90h to 9Fh W
10
A
A0h to AFh W
11
B
B0h to BFh W
12
C
C0h to CFh W
13
D
D0h to DFh W
14
E
E0h to EFh W
15
F
F0h to FFh W
16
10
100h to 10Fh W
17
11
110h to 11Fh W
18
12
120h to 12Fh W
19
13
130h to 13Fh W
20
14
140h to 14Fh W
21
15
150h to 15Fh W
22
16
160h to 16Fh W
23
17
170h to 17Fh W
24
18
180h to 18Fh W
25
19
190h to 19Fh W
26
1A
1A0h to
W
1AFh
27
1B
1B0h to
W
1BFh
28
1C
1C0h to
W
1CFh
29
1D
1D0h to
W
1DFh
30
1E
1E0h to
W
1EFh
31
1F
1F0h to
W
1FFh
Refer to
Section 9.2.1 on page 13
Section 9.2.2.1 on page 14
Section 9.2.2.3 “Register
initialization file (read/write)”
on page 16
Section 9.2.3 on page 18
CLRC632
Product data sheet
COMPANY PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 3.7 — 27 February 2014
073937
© NXP Semiconductors N.V. 2014. All rights reserved.
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