High Speed GMSK Modem
8
4 General Description
CMX589A PRELIMINARY INFORMATION
4.1 Clock Oscillator Divider
The TX and (nominal) RX data rates are determined by division of the frequency present at the Xtal pin as
generated by the on-chip Xtal oscillator, with external components, or supplied from an external source.
The division ratio is controlled by the logic level inputs on ClkDivA and ClkDivB pins as shown in Table 4,
together with an indication of how various standard data rates may be derived from common µP Xtal
frequencies.
Data Rate Xtal/Clk Frequency
Division Ratio (ClkDiv A/B)
Inputs
ClkDivA ClkDivB
0
0
0
1
1
0
1
1
* VDD 4.5V
Xtal/Clk Freq
Data Rate
128
256
512
1024
24.576*
192*
96*
48*
24*
Xtal/Clock Frequency (MHz)
8.192 4.9152 4.096 2.4576
12.288/3 12.288/5
Data Rate (kbps)
64* 38.4*
32
19.2
32 19.2
16
9.6
16 9.6
8
4.8
8
4.8
4
2.048
6.144/3
16
8
4
Table 4: Example Clock/Data Rates
Note: The device operation is not guaranteed above 200kbps or below 4kbps at the relevant supply voltage.
4.9152MHz
RxD
SERIAL RxC
I/O PORT TxD
TxC
µCONTROLLER
SETTINGS: D/RATE 4800 bps -BT 0.5 - Rx and Tx Enabled
VDD
XTAL/CLOCK
XTAL
Tx Enable
Rx DATA
Rx CLOCK
Tx ClOCK
Tx DATA
PLLacq
RxDCacq
CMX589A
GMSK MODEM
ClkDIVA
ClkDIVB
BT
RxHOLD
Rx S/N
Tx PS
Rx PS
Figure 4: Minimum Controller System Connections
4.2 Receive
4.2.1 Rx Signal Path Description
The function of the RX circuitry is to:
1. Set the incoming signal to a usable level.
2. Clean the signal by filtering.
3. Provide DC level thresholds for clock and data extraction.
4. Provide clock timing information for data extraction and external circuits.
5. Provide RX data in a binary form.
6. Assess signal quality and provide Signal-to-Noise information.
1998 MX-COM, Inc.
www.mxcom.com Tele: 800 638 5577 336 744 5050 Fax: 336 744 5054
Doc. # 20480183.002
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
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