CMX649 View Datasheet(PDF) - CML Microsystems Plc
Part Name
Description
MFG CO.
'CMX649' PDF : 50 Pages View PDF
ADM Codec
CMX649
ENCODE VAD THRESHOLD Register ($E2)
Encode VAD
Threshold
(Bits 15 – 0)
These bits directly program the threshold of detection for the Voice Activity Detector.
The number programmed into this register can range from $0 to $7FFF (0 to 32767).
The equation for the VAD threshold is:
Register Value = (Signal Detection Threshold) ⋅ 215
(DAC FullScale Reference Voltage)
ENCODE OFFSET LEVEL Register ($E3)
Encode Offset
Input
(Bits 15 - 0)
These bits allow for an offset amount to be directly programmed. This offset amount
is useful in trimming out offsets that may occur in the on-chip analog circuitry. The
number format is 2’s complement and ranges from $8000 through $0000 to $7FFF
(-32768 to 32767).
The equation for the direct offset value is:
Register Value =
(Offset Voltage) ⋅ 218
(DAC FullScale Reference Voltage)
For normal Encoder operation this register should be loaded with a small positive
constant (eg in the range [2-16]) and bit 8 of the ENCODER MODE AND SETUP
Register ($E0) should be set to logic 1. The programmed offset will be summed with
the encoder input signal. If offset compensation is not required, bit 8 of the register
$E0 should be set to logic 0 and the ENCODE OFFSET LEVEL Register should also
be set to logic 0.
Offset compensation can be suspended by loading this register with 0 while leaving
Bit 8 of register $E0 true. This holds the current offset estimate constant. The offset
estimate can be read out via the ENCODE OFFSET LEVEL OUTPUT Register
($E5).
ENCODE DAC INPUT Register ($E7)
Encode DAC
Input
(Bits 15 – 0)
This register allows direct access to the encoder DAC input. The number format is
2’s complement and ranges from $8000 through $0000 to $7FFF (-32768 to 32767).
ENCODE ADM INPUT TEST Register ($E8)
Encoder ADM
Input Test
(Bits 7 – 0)
This register allows ADM bits to be written via C-BUS for transcoding from ADM to
PCM. An interrupt can be enabled to inform a micro-controller when the register
needs reloading.
© 2003 CML Microsystems Plc
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D/649/2
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