ADM Codec
CMX649
DECODE ADM OUTPUT READ Register ($DA)
Decode ADM
Output
(Bits 7 – 0)
This register allows ADM bits to be read via C-BUS and is updated every eighth bit.
Bit 0 of the CODEC INTERRUPT CONTROL Register ($81) can be set to a logic 1 to
enable interrupts, informing a micro-controller when the register has been updated.
When the decoder is set to transcode from PCM to ADM the ADM bits are available
via this register.
ENCODE VAD LEVEL OUTPUT READ Register ($E4)
Encode VAD
Level Output
(Bits 15 – 0)
These bits indicate the average amplitude of the envelope of the audio signal. This
negative 2’s complement number can range from $0 to $8000 (0 to -32768) and can
be used to assist in calculating an appropriate value to be programmed into the
ENCODE VAD THRESHOLD Register ($E2).
The equation for the VAD level register value is:
Register Value = -1⋅ (Envelope voltage level) ⋅ 215
(DAC FullScale Reference Voltage)
ENCODE OFFSET LEVEL OUTPUT READ Register ($E5)
Encode Offset
Level Output
(Bits 15 – 0)
These bits indicate the offset level as input by the user in register $E3, which is
dynamically updated if Idle Channel Enhance is enabled. The number format is 2’s
complement and ranges from $8000 through $0000 to $7FFF (-32768 to 32767). It
can be used as an appropriate value to be programmed into the ENCODE OFFSET
LEVEL Register ($E3) if offset compensation will be disabled.
The equation for the offset value is:
Register Value =
(Offset Voltage) ⋅ 218
(DAC FullScale Reference Voltage)
ENCODE LINEAR PCM OUTPUT READ Register ($E6)
Encode Linear
PCM Output
(Bits 15 – 0)
This register containes the linear PCM equivalent of the encoded ADM signal. The
number format is 2’s complement and ranges from $8000 through $0000 to $7FFF
(-32768 to 32767). Bit 5 of the CODEC INTERRUPT CONTROL Register ($81) can
be set to a logic 1 to enable interrupts, informing a micro-controller when the register
has been updated.
The equation for the PCM register value is:
Register Value =
(PCM voltage) ⋅ 215
(DAC FullScale Reference Voltage)
ENCODE ADM OUTPUT READ Register ($EA)
Encode ADM
Output Test
(Bits 7 – 0)
This register allows Encoder ADM bits to be read via C-BUS and is updated every
eighth bit. Bit 4 of the CODEC INTERRUPT CONTROL Register ($81) can be set to
a logic 1 to enable interrupts, informing a micro-controller when the register has been
updated.
© 2003 CML Microsystems Plc
36
D/649/2