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CMX882D6 View Datasheet(PDF) - CML Microsystems Plc

Part Name
Description
MFG CO.
CMX882D6
CML
CML Microsystems Plc CML
'CMX882D6' PDF : 70 Pages View PDF
FRS Signalling Processor
CMX882
1.6.2 $01 C-BUS RESET: address only.
The reset command has no data attached to it. It sets the device registers into the states listed below.
Addr.
$B0
$B1
$B2
$B3
$B4
$C0
$C1
$C2
$C3
$C5
$C6
$C7
$C8
$C9
$CA
$CB
$CC
$CD
$CE
$CF
REG.
ANALOGUE GAIN
SIGNAL ROUTING
AUXILIARY ADC
THRESHOLDS
AUXILIARY ADC CONTROL
AUXILIARY ADC DATA
POWER DOWN CONTROL
MODE CONTROL
AUDIO & DEVICE ADDRESS
CONTROL
TX TONE
RX DATA 1
STATUS
MODEM CONTROL
PROGRAMMING REGISTER
XTCSS & RX DATA 2
TX DATA 1
XTCSS & TX DATA 2
TONE STATUS
AUDIO TONE
INTERRUPT MASK
Reserved Register Address
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0000000000000000
0000000000000000
1111111100000000
00000000
XXXXXXXX
0000000000000000
0000000000000000
0000000000000000
0000000000000000
XXXXXXXXXXXXXXXX
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
Following a general reset all of the programming registers (P0 – P4) are reset to zero except the
following:
P0.0
P0.1
P0.6
P0.7
P4.7
Frame Sync LSB
Frame Sync MSB
Bit Sync LSB
Bit Sync MSB
Transmit Limiter Control
- - - - 000000100011
- - - - 000011001011
- - - - 000001010101
- - - - 000001010101
--1- - - -- - - - - -- - -
This initiates the device with the MSK frame sync pattern of $CB23 and bit sync of alternate 1’s and 0’s.
The transmit limiter value is initialised to the maximum limit.
To initialise the device following power-up, or to clear the current device state, apply the following
sequence of C-Bus actions:
1. Send a C-Bus Reset command.
2. Send $2001 to the Mode Control register (C-Bus address $C1).
3. Send $0000 to the Mode Control register.
The device is now ready to be configured for its next application.
2004 CML Microsystems Plc
36
D/882/7
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