CRD8900-1 View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CRD8900-1' PDF : 132 Pages View PDF
CS8900
Register 16: Self Status (SelfST, Read-only)
Address: PacketPage base + 0136h
F
E
D
C
B
A
9
8
EEsize ELpresent EEPROM EEPROM SIBUSY
OK
present
SelfST reports the status of the EEPROM interface and the initialization process.
7
INITD
6
3.3V
Active
5-0
010110
BIT NAME
DESCRIPTION
5-0 010110
These bits provide an internal address used by the CS8900 to identify this as the Chip
Self Status Register. When reading this register, these bits will be 010110, where the
LSB corresponds to Bit 0.
6
3.3VActive
If the CS8900 is operating on a 3.3V supply, this bit is set. If the CS8900 is operating on
a 5V supply, this bit is clear.
7
INITD
If set, the CS8900 initialization, including read-in of the EEPROM, is complete.
8
SIBUSY
If set, the EECS output pin is high indicating that the EEPROM is currently being read
or programmed. The host must not write to PacketPage base + 0040h nor 0042h until
SIBUSY is clear.
9
EEPROM
present
If the EEDataIn pin is low after reset, there is no EEPROM present, and the
EEPROMpresent bit is clear. If the EEDataIn pin is high after reset, the CS8900
"assumes" that an EEPROM is present, and this bit is set.
A
EEPROMOK If set, the checksum of the EEPROM readout was OK.
B
ELpresent
If set, external logic for Latchable Address bus decode is present.
C EEsize
This bit shows the size of the attached EEPROM and is valid only if the
EEPROMpresent bit (Bit 9) and EEPROMOK bit (Bit A) are both set. If clear, the
EEPROM size is either 128 words (’C56 or ’CS56) or 256 words (C66 or ’CS66). If set,
the EEPROM size is 64 words (’C46 or ’CS46).
This register’s initial state after reset is: (X = Depends on Configuration.) 000X XXXX XX01 0110
DS150PP2
63
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