CRD8900-1 View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CRD8900-1' PDF : 132 Pages View PDF
CS8900
Register 18: Bus Status (BusST, Read-only)
F
E
D
C
B
A
9
BusST describes the status of the current transmit operation.
Address: PacketPage base + 0138h
8
7
6
Rdy4Tx TxBidErr
NOW
5-0
011000
BIT NAME
5-0 011000
7
TxBidErr
DESCRIPTION
These bits provide an internal address used by the CS8900 to identify this as the Bus
Status Register. When reading this register, these bits will be 011000, where the LSB
corresponds to Bit 0.
If set, the host has commanded the CS8900 to transmit a frame that the CS8900 will
not send. Frames that the CS8900 will not send are:
1) Any frame greater than 1514 bytes, provided that InhibitCRC
(Register 9, TxCMD, Bit C) is clear.
2) Any frame greater than 1518 bytes.
Note that this bit is not set when transmit frames are too short.
8
Rdy4TxNOW Rdy4TxNOW signals the host that the CS8900 is ready to accept a frame from the host
for transmission. This bit is similar to Rdy4Tx (Register C, BufEvent, Bit 8) except that
there is no interrupt associated with Rdy4TxNOW. The host can poll the CS8900 and
check Rdy4TxNOW to determine if the CS8900 is ready for transmit. (See Section 5.7
for a description of the transmit bid process.)
This register’s initial state after reset is: 0000 0000 XX01 1000
DS150PP2
65
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