5/13/08
CS42L52
6.17 Passthrough x Volume: PASSAVOL (Address 14h) & PASSBVOL (Address 15h)
7
6
5
4
3
2
1
0
PASSxVOL7 PASSxVOL6 PASSxVOL5 PASSxVOL4 PASSxVOL3 PASSxVOL2 PASSxVOL1 PASSxVOL0
6.17.1 Passthrough x Volume
Sets the volume/gain of the signal routed from the PGA to the headphone/line output.
PASSxVOL[7:0]
0111 1111
...
0001 1000
...
0000 0001
0000 0000
11111 1111
...
1000 1000
...
1000 0000
Step Size:
Application:
Gain
12 dB
...
12 dB
...
+0.5 dB
0 dB
-0.5 dB
...
-60.0 dB
...
-60.0 dB
0.5 dB (approximate)
“Analog In to Analog Out Passthrough” on page 32
Notes:
1. This register is ignored when the PASSTHRUx bit (“Passthrough Analog” on page 52) is disabled.
2. The step size may deviate from 0.5 dB at settings below -40 dB. Code settings 0x95, 0xA1, 0xAD,
and 0xB9 are not guaranteed to be monotonic.
6.18 ADCx Volume Control: ADCAVOL (Address 16h) & ADCBVOL (Address 17h)
7
6
5
4
3
2
1
0
ADCAVOL7 ADCAVOL6 ADCAVOL5 ADCAVOL4 ADCAVOL3 ADCAVOL2 ADCAVOL1 ADCAVOL0
6.18.1 ADCx Volume
Sets the volume of the ADC signal out the serial data output (SDOUT).
ADCxVOL[7:0]
0111 1111
...
0001 1000
...
0000 0000
1111 1111
1111 1110
...
1010 0000
...
1000 0000
Step Size:
Volume
24 dB
...
24 dB
...
0 dB
-1.0 dB
-2.0 dB
...
-96.0 dB
...
-96.0 dB
1.0 dB
DS680F1
57