CS42L52 View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CS42L52' PDF : 82 Pages View PDF
5/13/08
6.10 ADC HPF Corner Frequency (Address 0Bh)
7
Reserved
6
Reserved
5
Reserved
4
Reserved
3
HPFB_CF1
2
HPFB_CF0
CS42L52
1
HPFA_CF1
0
HPFA_CF0
6.10.1 HPF x Corner Frequency
Sets the corner frequency (-3 dB point) for the internal High-Pass Filter (HPF).
HPFx_CF[1:0]
00
01
10
11
HPF Corner Frequency Setting (Fs=48 kHz)
Normal setting as specified in “ADC Digital Filter Characteristics” on page 14
119 Hz
236 Hz
464 Hz
6.11 Misc. ADC Control (Address 0Ch)
7
ADCB=A
6
DIGMUX
5
DIGSUM1
4
DIGSUM0
3
INV_ADCB
2
1
0
INV_ADCA ADCBMUTE ADCAMUTE
6.11.1 Analog Front-End Volume Setting B=A
Configures independent or ganged volume control and muting of the analog front end.
ADCB=A
0
1
Single Volume Control
Disabled
Enabled
Affected Volume Controls
ADCxVOL[7:0] (“ADCx Volume” on page 57),
ADCxMUTE (“ADC Mute” on page 51),
ALC and Limiter Attack/Release (page 66 to page 68)
MICxGAIN[4:0] (“MICx Gain” on page 55),
PGAxVOL[5:0] (“PGAx Volume” on page 56),
PASSxVOL[7:0] (“Passthrough x Volume” on page 57)
6.11.2 Digital MUX
Selects the signal source for the ADC serial port
DIGMUX
0
1
SDOUT Signal Source
ADC
DSP
6.11.3 Digital Sum
Configures a mix/swap of ADCA and ADCB.
DIGSUM[1:0]
00
01
10
11
Serial Output Signal
Left Channel
ADCA
(ADCA + ADCB)/2
(ADCA - ADCB)/2
ADCB
Right Channel
ADCB
(ADCA + ADCB)/2
(ADCA - ADCB)/2
ADCA
50
DS680F1
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