5. REGISTER QUICK REFERENCE
CS43L21
Software mode register defaults are as shown. “Reserved” registers must maintain their default state.
Addr Function
7
6
5
4
3
2
1
0
01h ID
p 39
default
02h Power Ctl. 1
p 39
default
03h Speed Ctl. &
Power Ctl. 2
p 40
default
04h Interface Ctl.
p 41
default
05h Reserved
Chip_ID4
1
Chip_ID3
1
Chip_ID2
0
Chip_ID1
1
Chip_ID0
1
Rev_ID2
0
Rev_ID1
0
Rev_ID0
1
Reserved
0
AUTO
PDN_DACB PDN_DACA Reserved Reserved Reserved Reserved
0
0
1(See Note 1(See Note 1(See Note 1(See Note
2 on page 2 on page 2 on page 2 on page
39)
39)
39)
39)
SPEED1 SPEED0 3-ST_SP Reserved Reserved Reserved
PDN
0
MCLKDIV2
1
0
1
0
1
1
1
0
Reserved
0
M/S
DAC_DIF2 DAC_DIF1 DAC_DIF0 Reserved Reserved Reserved
0
0
0
0
0
0
0
Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved
default
06h Reserved
0
0
0
0
0
0
0
0
Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved
default
07h Reserved
1
0
1
0
0
0
0
0
Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved
default
08h DAC Output
Control
p 41
default
09h DAC Control
p 42
default
0Ah Reserved
default
0Bh Reserved
default
0Ch Reserved
default
0Dh Reserved
default
0Eh Reserved
default
0
0
0
HP_GAIN2 HP_GAIN1 HP_GAIN0
0
1
1
DATA_SEL1 DATA_SEL0 FREEZE
0
0
0
Reserved
0
Reserved
0
Reserved
0
Reserved
0
Reserved
0
Reserved
0
Reserved Reserved Reserved
0
0
0
Reserved Reserved Reserved
0
0
0
Reserved Reserved Reserved
1
0
0
0
DAC_SNG
VOL
0
Reserved
0
Reserved
0
Reserved
0
Reserved
0
Reserved
0
Reserved
0
0
0
0
0
INV_PCMB INV_PCMA
0
0
DACB_
MUTE
0
DACA_
MUTE
0
DEEMPH
0
AMUTE
1
DAC_SZC1 DAC_SZC0
1
0
Reserved Reserved Reserved Reserved
0
0
0
0
Reserved Reserved Reserved Reserved
0
0
0
0
Reserved Reserved Reserved Reserved
0
0
0
0
Reserved Reserved Reserved Reserved
0
0
0
0
Reserved Reserved Reserved Reserved
0
0
0
0
36
DS723A1