CS43L22 View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CS43L22' PDF : 66 Pages View PDF
Confidential Draft
3/4/10
CS43L22
7. REGISTER DESCRIPTION
All registers are read/write except for the chip I.D. and Revision Register and Interrupt Status Register which are
read only. See the following bit definition tables for bit assignment information. The default state of each bit after a
power-up sequence or reset is shown as shaded in the table. Unless otherwise specified, all “Reserved” bits must
maintain their default value.
7.1 Chip I.D. and Revision Register (Address 01h) (Read Only)
7
CHIPID4
6
CHIPID3
5
CHIPID2
4
CHIPID1
3
CHIPID0
2
REVID2
1
REVID1
0
REVID0
7.1.1
Chip I.D. (Read Only)
I.D. code for the CS43L22.
CHIPID[4:0]
11100
Device
CS43L22
7.1.2
Chip Revision (Read Only)
CS43L22 revision level.
REVID[2:0]
000
001
010
011
Revision Level
A0
A1
B0
B1
7.2 Power Control 1 (Address 02h)
7
PDN7
6
PDN6
5
PDN5
4
PDN4
3
PDN3
2
PDN2
1
PDN1
0
PDN0
7.2.1
Power Down
Configures the power state of the CS43L22.
PDN[7:0]
0000 0001
1001 1110
1001 1111
Status
Powered Down - same as setting 1001 1111
Powered Up
Powered Down - same as setting 0000 0001
Note:
1. All states of PDN[7:0] not shown in the table are reserved.
DS792F2
37
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