CS51313 View Datasheet(PDF) - ON Semiconductor
Part Name
Description
MFG CO.
CS51313
ON Semiconductor
'CS51313' PDF : 23 Pages View PDF
CS51313
α = 0.00393/°C
T= operating temperature;
R = desired droop resistor value.
For temperature T = 50°C, the % R change = 12%.
Droop Resistor Tolerance
Tolerance due to sheet resistivity variation ±8.0%
Tolerance due to L/W error
1.0%
Tolerance due to temperature variation
12%
Total tolerance for droop resistor
21%
In order to determine the droop resistor value the nominal
voltage drop across it at full load has to be calculated. This
voltage drop has to be such that the output voltage at full load
is above the minimum DC tolerance spec:
VDROOP(TYP)
+
VDAC(MIN) * VDC(MIN)
1.0 ) RDROOP(TOLERANCE)
Example: for a 450 MHz Pentium II, the DC accuracy
spec is 1.93 < VCC(CORE) < 2.07 V, and the AC accuracy spec
is 1.9 V < VCC(CORE) < 2.1 V. The CS51313 DAC output
voltage is +2.001 V < VDAC < +2.049 V. In order not to
exceed the DC accuracy spec, the voltage drop developed
across the resistor must be calculated as follows:
VDROOP(TYP)
+
(VDAC(MIN) * VDC(MIN))
1.0 ) RDROOP(TOLERANCE)
+
+2.001
V*
1.21
1.93
V
+
71
mV
With the CS51313 DAC accuracy being 1.0%, the internal
error amplifier’s reference voltage is trimmed so that the
output voltage will be 25 mV high at no load. With no load,
there is no DC drop across the resistor, producing an output
voltage tracking the error amplifier output voltage,
including the offset. When the full load current is delivered,
a drop of −50 mV is developed across the resistor. Therefore,
the regulator output is pre−positioned at 25 mV above the
nominal output voltage before a load turn−on. The total
voltage drop due to a load step is ΔV − 25 mV and the
deviation from the nominal output voltage is 25 mV smaller
than it would be if there was no droop resistor. Similarly at
full load the regulator output is pre−positioned at 25 mV
below the nominal voltage before a load turn−off. the total
voltage increase due to a load turn−off is ΔV − 25 mV and
the deviation from the nominal output voltage is 25 mV
smaller than it would be if there was no droop resistor. This
is because the output capacitors are pre−charged to a value
that is either 25 mV above the nominal output voltage before
a load turn−on or, 25 mV below the nominal output voltage
before a load turn−off .
Obviously, the larger the voltage drop across the droop
resistor (the larger the resistance), the worse the DC and load
regulation, but the better the AC transient response.
Current Limit
The current limit setpoint has to be higher than the normal
full load current. Attention has to be paid to the current rating
of the external power components as these are the first to fail
during an overload condition. The MOSFET continuous and
pulsed drain current rating at a given case temperature has
to be accounted for when setting the current limit trip point.
Temperature curves on MOSFET manufacturers’ data
sheets allow the designer to determine the MOSFET drain
current at a particular VGS and TJ (junction temperature).
This, in turn, will assist the designer to set a proper current
limit, without causing device breakdown during an overload
condition.
Let’s assume the full CPU load is 16A. The internal
current sense comparator current limit voltage limits are:
77 mV < VTH < 101 mV. Also, there is a 21% total variation
in RSENSE as discussed in the previous section.
We compute the value of the current sensing element
(embedded PCB trace) for the minimum current limit
setpoint:
RSENSE(MIN) + RSENSE(TYP) 0.79
RSENSE(MAX) + RSENSE(TYP) 1.21
RSENSE(MAX)
+
VTH(MIN)
ICL(MIN)
+
77 mV
16 A
+
4.8
mW
We select,
RSENSE(TYP) + 3.3 mW
We calculate the range of load currents that will cause the
internal current sense comparator to detect an overload
condition.
Nominal Current Limit Setpoint
From the overcurrent detection data in the electrical
characteristics table:
VTH(TYP) + 86 mV
ICL(NOM)
+
VTH(TYP)
RSENSE(NOM)
+
86
3.3
mV
mW
+
26
A
Maximum Current Limit Setpoint
From the overcurrent detection data in the electrical
characteristics table:
VTH(MAX) + 101 mV
ICL(MAX)
+
VTH(MAX)
RSENSE(MIN)
+
VTH(MAX)
RSENSE(NOM)
0.79
+
3.3
101
mW
mV
0.79
+
38.7
A
Therefore, the range of load currents that will cause the
internal current sense comparator to detect an overload
condition through a 3.3mΩ embedded PCB trace is: 19.3 A
< ICL < 38.7 A, with 26 A being the nominal overload
condition.
Design Rules for Using a Droop Resistor
The basic equation for laying an embedded resistor is:
RAR + ò
L
A
or
R+ò
L
(W t)
where:
A = W × t = cross−sectional area;
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