CS8952
6.15 Descrambler Key Initialization Register - Address 16h
15
14
Load
7
6
13
12
11
Reserved
5
4
3
Descrambler Initialization Key
10
9
8
Descrambler Initialization Key
2
1
0
BIT
15
14:11
10:0
NAME
Load
TYPE
Read/Set
Reserved
Read Only
Descrambler Initial- Read/Write
ization Key
RESET
DESCRIPTION
0
When this bit is set, the descrambler will be loaded
with the value in the Descrambler Initialization Key
field. When the load is complete, this bit will clear
automatically.
0000
These bits should be read as don’t cares and, when
written, should be written to 0.
Reset value is This register allows the Descrambler to be loaded
dependent on the with a user-definable key sequence. A value of 000h
PHY Address field has the effect of bypassing the descrambler function.
of the Self Status
Register (address This is valuable for testing purposes to allow a deter-
19h).
ministic response to test stimulus without a synchro-
nization delay.
Note: This field is disabled, and writes to this bit are
ignored when the National Compatibility Mode bit of
the 10BASE-T Configuration Register (address 1Ch)
is set.
CrystalLAN™ 100BASE-X and 10BASE-T Transceiver
51
DS206F1